component
TPS54225PWP
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Texas Instruments DC-DC Converters, HTSSOP-14-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+51@@ -0,0 +1,51 @@+# TPS54225PWP++**Texas Instruments** · DC-DC Converters · HTSSOP-14-EP++TPS54225PWP from Texas Instruments, in a HTSSOP-14-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VO | input | Connect to the output of the converter; this pin is used for on-time adjustment. |+| 2 | VFB | input | Converter feedback input; connect with feedback resistor divider (threshold typically 765 mV at 25°C). |+| 3 | VREG5 | power_out | 5.5 V power supply output; a capacitor (typical 1 µF) should be connected to GND. |+| 4 | SS | passive | Soft-start control; an external capacitor should be connected to GND. |+| 5 | GND | power_in | Signal ground pin. |+| 6 | PG | output | Open drain power good output. |+| 7 | EN | input | Enable control input (high level above 2 V, low level below 0.4 V; absolute max 20 V). |+| 8 | PGND1 | power_in | Ground return for low-side MOSFET and input of current comparators; connect PGND1, PGND2 and GND strongly together near the IC. |+| 9 | PGND2 | power_in | Ground return for low-side MOSFET and input of current comparators; connect PGND1, PGND2 and GND strongly together near the IC. |+| 10 | SW2 | passive | Switch node between high-side and low-side NFET and input to current comparators. |+| 11 | SW1 | passive | Switch node between high-side and low-side NFET and input to current comparators. |+| 12 | VBST | passive | Supply input for high-side NFET gate driver (boost terminal); connect capacitor from this pin to SW1, SW2 terminals, with an internal PN diode from VREG5 to VBST. |+| 13 | VIN | power_in | Power input connected to high side NFET drain; recommended range 2 V to 18 V. |+| 14 | VCC | power_in | Supply input for the 5 V internal linear regulator for control circuitry; recommended range 4.5 V to 18 V. |+| 15 | PowerPAD | passive | Thermal pad on package back side; must be soldered for adequate dissipation and should be connected to PGND. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HTSSOP-14-EP |+| Category | Power Management (PMIC) |+| Pins | 15 |++## CAD (KiCad official)++- Symbol: `TPS54225PWP`+- Footprint: `Package_SO:TSSOP-14-1EP_4.4x5mm_P0.65mm`+- 3D model: HTSSOP-14-EP (KiCad packages3D, STEP)+- 3D model files: `tps54225pwp-etched.step` / `tps54225pwp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps54225pwp.step` / `tps54225pwp.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps54225) (29 pp, sha256 `3c3ac317d4ab1b65`, retrieved 2026-10-01, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps54225pwp-datasheet.pdf)
page.jsonadded+202@@ -0,0 +1,202 @@+{+ "slug": "tps54225pwp",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments DC-DC Converters, HTSSOP-14-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tps54225pwp",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps54225pwp.kicad_sym",+ "tps54225pwp.kicad_mod",+ "tps54225pwp.glb",+ "tps54225pwp.step",+ "tps54225pwp.lbr",+ "docs/hero.png",+ "docs/tps54225pwp-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "TPS54225PWP",+ "manufacturer": "Texas Instruments",+ "package": "HTSSOP-14-EP",+ "pin_count": 15,+ "category": "Power Management (PMIC)",+ "subcategory": "DC-DC Converters",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps54225",+ "parts": {+ "symbol": "tps54225pwp.kicad_sym",+ "footprint": "tps54225pwp.kicad_mod",+ "model_3d": "tps54225pwp-etched.glb",+ "model_3d_plain": "tps54225pwp.glb",+ "model_3d_step": "tps54225pwp-etched.step",+ "model_3d_step_plain": "tps54225pwp.step",+ "lbr": "tps54225pwp.lbr"+ },+ "distributor_links": {+ "lcsc": "C1355858",+ "digikey": "296-34611-5-ND",+ "mouser": "595-TPS54225PWP"+ },+ "distributor_check": {+ "checked_at": "2026-10-01T07:58:53Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-34611-5-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TPS54225PWP",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VO",+ "type": "input",+ "description": "Connect to the output of the converter; this pin is used for on-time adjustment."+ },+ {+ "number": "2",+ "name": "VFB",+ "type": "input",+ "description": "Converter feedback input; connect with feedback resistor divider (threshold typically 765 mV at 25°C)."+ },+ {+ "number": "3",+ "name": "VREG5",+ "type": "power_out",+ "description": "5.5 V power supply output; a capacitor (typical 1 µF) should be connected to GND."+ },+ {+ "number": "4",+ "name": "SS",+ "type": "passive",+ "description": "Soft-start control; an external capacitor should be connected to GND."+ },+ {+ "number": "5",+ "name": "GND",+ "type": "power_in",+ "description": "Signal ground pin."+ },+ {+ "number": "6",+ "name": "PG",+ "type": "output",+ "description": "Open drain power good output."+ },+ {+ "number": "7",+ "name": "EN",+ "type": "input",+ "description": "Enable control input (high level above 2 V, low level below 0.4 V; absolute max 20 V)."+ },+ {+ "number": "8",+ "name": "PGND1",+ "type": "power_in",+ "description": "Ground return for low-side MOSFET and input of current comparators; connect PGND1, PGND2 and GND strongly together near the IC."+ },+ {+ "number": "9",+ "name": "PGND2",+ "type": "power_in",+ "description": "Ground return for low-side MOSFET and input of current comparators; connect PGND1, PGND2 and GND strongly together near the IC."+ },+ {+ "number": "10",+ "name": "SW2",+ "type": "passive",+ "description": "Switch node between high-side and low-side NFET and input to current comparators."+ },+ {+ "number": "11",+ "name": "SW1",+ "type": "passive",+ "description": "Switch node between high-side and low-side NFET and input to current comparators."+ },+ {+ "number": "12",+ "name": "VBST",+ "type": "passive",+ "description": "Supply input for high-side NFET gate driver (boost terminal); connect capacitor from this pin to SW1, SW2 terminals, with an internal PN diode from VREG5 to VBST."+ },+ {+ "number": "13",+ "name": "VIN",+ "type": "power_in",+ "description": "Power input connected to high side NFET drain; recommended range 2 V to 18 V."+ },+ {+ "number": "14",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply input for the 5 V internal linear regulator for control circuitry; recommended range 4.5 V to 18 V."+ },+ {+ "number": "15",+ "name": "PowerPAD",+ "type": "passive",+ "description": "Thermal pad on package back side; must be soldered for adequate dissipation and should be connected to PGND."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin names for pins 8 and 9: The datasheet PIN FUNCTIONS table uses formatting that groups these pins; SW1/SW2 pin classification: Described as serving dual functions - driven as switch nodes by the MOSF",+ "exposed pad 15 added from the footprint",+ "dropped thermal pad ['EP'] absent from footprint"+ ],+ "pages_sent": 9,+ "cost_usd": 0.1541,+ "at": "2026-10-01T07:58:39"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps54225",+ "pages": 29,+ "sha256": "3c3ac317d4ab1b65",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 15,+ "described": 15,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}