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Contents

README

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TPS54218RTER

Texas Instruments · DC-DC Converters · WQFN-16-EP(3x3)

TPS54218RTER from Texas Instruments, in a WQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Input supply voltage, operating range 2.95 V to 6 V.
2 VIN power_in Input supply voltage, operating range 2.95 V to 6 V.
3 GND power_in Power ground; connect directly to the power pad under the device.
4 GND power_in Power ground; connect directly to the power pad under the device.
5 AGND power_in Analog ground; should be electrically connected to GND close to the device.
6 VSENSE input Inverting node of the transconductance error amplifier for output voltage feedback, operates at 0.8 V reference.
7 COMP output Error amplifier output and input to the output switch current comparator; connect frequency compensation components to this pin.
8 RT/CLK bidirectional Resistor timing pin for setting switching frequency 200 kHz to 2000 kHz, or external clock input for synchronization at 300 kHz to 2000 kHz.
9 SS bidirectional Soft-start pin; external capacitor connected to ground sets output voltage rise time with internal charge current 2.07 µA.
10 PH output Switching node; source of the internal high-side power MOSFET and drain of the internal low-side synchronous rectifier MOSFET.
11 PH output Switching node; source of the internal high-side power MOSFET and drain of the internal low-side synchronous rectifier MOSFET.
12 PH output Switching node; source of the internal high-side power MOSFET and drain of the internal low-side synchronous rectifier MOSFET.
13 BOOT input Bootstrap capacitor connection between BOOT and PH pins; provides gate drive voltage for high-side MOSFET, requires 0.1 µF ceramic capacitor minimum.
14 PWRGD tri_state Power good open-drain output; asserts low when output voltage falls below 91% or rises above 107% of nominal reference, typical hysteresis 2%.
15 EN input Enable pin with internal pull-up current source; pull below 1.2 V to disable device, float to enable, threshold range 1.16 V to 1.37 V rising.
16 VIN power_in Input supply voltage, operating range 2.95 V to 6 V.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WQFN-16-EP(3x3)
Category Power Management ICs
Pins 17

CAD (KiCad official)

  • Symbol: TPS54218RTER
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: WQFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: tps54218rter-etched.step / tps54218rter-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps54218rter.step / tps54218rter.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (43 pp, sha256 ca4e03e545b03c91, retrieved 2026-09-23, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF