Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

TPS5405DR

Texas Instruments · DC-DC Converters · SOIC-8

TPS5405DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BOOT passive Bootstrap capacitor pin. A 0.1-µF bootstrap capacitor is required between BOOT and LX to supply the gate drive for the integrated high-side N-channel MOSFET. Internal boot UVLO trips at 2.1 V typical.
2 VIN power_in Input supply voltage, 6.5 V to 28 V. UVLO rising threshold is 3.5 V typical with 200 mV hysteresis. Bypass with an input capacitor close to the pin.
3 ROSC input Switching frequency program pin. Connect a resistor to GND to set the switching frequency (50 kHz to 1.1 MHz range). Leave open for the default 120-kHz switching frequency; connect to GND for ~70 kHz.
4 SS passive Soft-start pin. An external capacitor connected to this pin sets the output rise time; internally charged with a 2-µA current source. Absolute max voltage 3 V.
5 VSENSE input Output voltage feedback pin. Regulated to 5 V (4.85 V min, 5.15 V max) internally; connect directly to the regulated output for the fixed 5-V output.
6 COMP output Error amplifier output and input to the PWM comparator. Connect external frequency compensation components (Rc, Cc) from this pin to GND for loop stability.
7 GND power_in Device ground return. Common reference for all internal circuitry and the power stage.
8 LX power_out Switching node - source of the integrated high-side N-channel MOSFET. Connects to the external inductor and catch diode. Switching node anti-ringing is integrated to reduce EMI.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category PMIC
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • TPS5405DR

CAD (KiCad official)

  • Symbol: TPS5405DR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tps5405dr-etched.step / tps5405dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps5405dr.step / tps5405dr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tps5405dr.step 122 KB You want the bare part, or you mark your own boards.
tps5405dr-etched.step 2.1 MB You want the part with TPS5405DR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 508 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (20 pp, sha256 6449316fbdb7226f, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF