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TPS54040DGQR

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by adom

Texas Instruments DC-DC Converters, MSOP-10-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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docs tps54040dgqr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers tps54040dgqr: viewers · Ray 1mo ago
package.json tps54040dgqr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
page.json tps54040dgqr: specified limits as data (metadata.characteristics, 47 rows from the datasheet) · Ray 25d ago
README.md tps54040dgqr: specified limits as data (metadata.characteristics, 47 rows from the datasheet) · Ray 25d ago
tps54040dgqr-etched.fit.json tps54040dgqr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
tps54040dgqr-etched.glb tps54040dgqr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
tps54040dgqr-etched.step tps54040dgqr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
tps54040dgqr.glb Publish 0.1.0 · Ray 1mo ago
tps54040dgqr.kicad_mod Publish 0.1.0 · Ray 1mo ago
tps54040dgqr.kicad_sym Publish 0.1.0 · Ray 1mo ago
tps54040dgqr.lbr Publish 0.1.0 · Ray 1mo ago
tps54040dgqr.step Publish 0.1.0 · Ray 1mo ago

TPS54040DGQR

Texas Instruments · DC-DC Converters · MSOP-10-EP

TPS54040DGQR from Texas Instruments, in a MSOP-10-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BOOT output Bootstrap capacitor node for high-side MOSFET gate drive, requiring 0.1 μF ceramic capacitor between BOOT and PH to provide gate voltage.
2 VIN power_in Input power supply voltage with operating range 3.5 V to 42 V and absolute maximum rating of 47 V.
3 EN input Enable control input with enable threshold 0.9 V to 1.55 V and internal pull-up current source for adjustable input UVLO.
4 SS/TR input Slow-start and tracking input for setting output voltage rise time using external capacitor with 2 μA internal charge current.
5 RT/CLK input Resistor timing and external clock input for adjusting switching frequency from 100 kHz to 2500 kHz via resistor or external synchronization signal.
6 PWRGD tri_state Open-drain power-good output asserted low when output voltage is outside 94% to 107% of nominal reference or during thermal shutdown/UVLO.
7 VSENSE input Inverting input to transconductance error amplifier for output voltage feedback with maximum rating −0.3 V to 3 V.
8 COMP output Error amplifier output with DC gain 10,000 V/V and transconductance 97 μA/V for external frequency compensation network connection.
9 GND power_in Ground reference and return path, must be electrically connected to exposed thermal pad for proper operation.
10 PH output High-side MOSFET source and switching node connecting to output inductor and catch diode with voltage rating −0.6 V to 47 V.
11 PowerPAD power_in Exposed thermal pad electrically connected to GND, required for thermal management and junction temperature control of IC.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package MSOP-10-EP
Category Power Management (PMIC)
Pins 11

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VIN input voltage -0.3 47 V 4
EN voltage -0.3 5 V 4
BOOT voltage 55 V 4
VSENSE voltage -0.3 3 V 4
COMP voltage -0.3 3 V 4
PWRGD voltage -0.3 6 V 4
SS/TR voltage -0.3 3 V 4
RT/CLK voltage -0.3 3.6 V 4
BOOT-PH voltage 8 V 4
PH output voltage -0.6 47 V 4
PH voltage transient -2 47 V 10-ns transient 4
Voltage difference PAD to GND -200 200 mV 4
EN current (source/sink, direction as printed in table) 100 μA 4
BOOT current (source/sink, direction as printed in table) 100 mA 4
VSENSE current (source/sink, direction as printed in table) 10 μA 4
RT/CLK current (source/sink, direction as printed in table) 100 μA 4
COMP sink current 100 μA 4
PWRGD sink current 10 mA 4
SS/TR current (source/sink, direction as printed in table) 200 μA 4
Operating junction temperature (absolute maximum) -40 150 °C 4
Storage temperature Tstg -65 150 °C 4
VIN supply voltage 3.5 42 V 4
Output voltage range for adjustable voltage 0.8 V 4
Operating junction temperature -40 150 °C 4
Operating input voltage 3.5 42 V TJ = –40°C to 150°C, VIN = 3.5 to 42 V 5
Shutdown supply current 1.3 4 μA EN = 0 V, 25°C, 3.5 V ≤ VIN ≤ 42 V 5
Operating nonswitching supply current 116 136 μA VSENSE = 0.83 V, VIN = 12 V, 25°C 5
Enable threshold voltage 0.9 1.25 1.55 V No voltage hysteresis, rising and falling, 25°C 5
Error amplifier source/sink current -7 7 μA V(COMP) = 1 V, 100 mV overdrive 5
Voltage reference 0.792 0.8 0.808 V TJ = 25°C 5
Voltage reference 0.784 0.8 0.816 V 5
High-side MOSFET on-resistance 200 410 mΩ VIN = 12 V, BOOT-PH = 6 V 5
Current limit threshold 0.6 0.94 A VIN = 12 V, TJ = 25°C 6
Switching frequency range (RT mode) 100 2500 kHz using RT mode 6
Switching frequency fSW 450 581 720 kHz RT = 200 kΩ 6
Switching frequency range (CLK mode) 300 2200 kHz using CLK mode 6
Minimum CLK input pulse width 40 ns 6
RT/CLK high threshold 1.9 2.2 V 6
RT/CLK low threshold 0.5 0.7 V 6
Minimum VIN for defined output 0.95 1.5 V V(PWRGD) < 0.5 V, II(PWRGD) = 100 μA 6
Junction-to-ambient thermal resistance (standard board) RθJA 62.5 °C/W standard board 5
Junction-to-case (top) thermal resistance (printed with symbol RθJA) RθJA 83 °C/W 5
Junction-to-ambient thermal resistance (custom board) (printed with symbol RθJC(top)) RθJC(top) 57 °C/W custom board 5
Junction-to-board thermal resistance RθJB 28 °C/W 5
Junction-to-top characterization parameter ψJT 1.7 °C/W 5
Junction-to-board characterization parameter ψJB 20.1 °C/W 5
Junction-to-case (bottom) thermal resistance RθJC(bot) 21 °C/W 5

CAD (KiCad official)

  • Symbol: TPS54040DGQR
  • Footprint: Package_SO:MSOP-10-1EP_3x3mm_P0.5mm_EP1.68x1.88mm
  • 3D model: MSOP-10-EP (KiCad packages3D, STEP)
  • 3D model files: tps54040dgqr-etched.step / tps54040dgqr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps54040dgqr.step / tps54040dgqr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (56 pp, sha256 5d8a2e37ee318b10, retrieved 2026-09-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF