TPS53667RTAT

@@ -0,0 +1,399 @@+{+  "slug": "tps53667rtat",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments DC-DC Converters, WQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "tps53667rtat",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "tps53667rtat.kicad_sym",+    "tps53667rtat.kicad_mod",+    "tps53667rtat.glb",+    "tps53667rtat.step",+    "tps53667rtat.lbr",+    "docs/hero.png",+    "docs/tps53667rtat-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "tps53667rtat-hero.glb",+    "tps53667rtat-hero.overlay.json"+  ],+  "component": {+    "mpn": "TPS53667RTAT",+    "manufacturer": "Texas Instruments",+    "package": "WQFN-40-EP(6x6)",+    "pin_count": 41,+    "category": "Power Management (PMIC)",+    "subcategory": "DC-DC Converters",+    "datasheet": "https://www.ti.com/cn/lit/gpn/tps53667",+    "parts": {+      "symbol": "tps53667rtat.kicad_sym",+      "footprint": "tps53667rtat.kicad_mod",+      "model_3d": "tps53667rtat-hero.glb",+      "model_3d_plain": "tps53667rtat.glb",+      "model_3d_step": "tps53667rtat-etched.step",+      "model_3d_step_plain": "tps53667rtat.step",+      "lbr": "tps53667rtat.lbr"+    },+    "distributor_links": {+      "lcsc": "C2650260",+      "digikey": "296-44940-2-ND",+      "mouser": "595-TPS53667RTAT"+    },+    "distributor_check": {+      "checked_at": "2026-10-07T23:55:52Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-44940-2-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-TPS53667RTAT",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "OCL-R",+        "type": "input",+        "description": "A resistor to GND and the voltage on this pin select one of 16 per-phase OCL levels and one of four RAMP levels, latched when V3R3 powers up."+      },+      {+        "number": "2",+        "name": "IMON",+        "type": "output",+        "description": "Analog current monitor output; the digitized IMON value is compared against OC_FAULT_LIMIT (1.25× IMAX by default) for overcurrent protection."+      },+      {+        "number": "3",+        "name": "CSP1",+        "type": "input",+        "description": "Positive current-sense input to be connected to the IOUT pin of a TI smart power stage (e.g. CSD9549x), with recommended range −0.1 V to 2.5 V."+      },+      {+        "number": "4",+        "name": "CSP2",+        "type": "input",+        "description": "Positive current-sense input to be connected to the IOUT pin of a TI smart power stage; tie to V3R3 to disable this phase, with recommended range −0.1 V to 2.5 V."+      },+      {+        "number": "5",+        "name": "CSP3",+        "type": "input",+        "description": "Positive current-sense input to be connected to the IOUT pin of a TI smart power stage; tie to V3R3 to disable this phase, with recommended range −0.1 V to 2.5 V."+      },+      {+        "number": "6",+        "name": "CSP4",+        "type": "input",+        "description": "Positive current-sense input to be connected to the IOUT pin of a TI smart power stage; tie to V3R3 to disable this phase, with recommended range −0.1 V to 2.5 V."+      },+      {+        "number": "7",+        "name": "CSP5",+        "type": "input",+        "description": "Positive current-sense input to be connected to the IOUT pin of a TI smart power stage; tie to V3R3 to disable this phase, with recommended range −0.1 V to 2.5 V."+      },+      {+        "number": "8",+        "name": "CSP6",+        "type": "input",+        "description": "Positive current-sense input to be connected to the IOUT pin of a TI smart power stage; tie to V3R3 to disable this phase, with recommended range −0.1 V to 2.5 V."+      },+      {+        "number": "9",+        "name": "VSP",+        "type": "input",+        "description": "Positive input of the remote voltage-sense amplifier, connected directly to the load, with recommended range −0.1 V to 2.5 V."+      },+      {+        "number": "10",+        "name": "VSN",+        "type": "input",+        "description": "Negative input of the remote voltage-sense amplifier, connected directly to the load ground, with recommended range −0.1 V to 0.1 V."+      },+      {+        "number": "11",+        "name": "COMP",+        "type": "output",+        "description": "Output of the gM error amplifier; resistors and capacitors between this pin and VREF set the compensation, with recommended maximum of 5.5 V."+      },+      {+        "number": "12",+        "name": "ISUM",+        "type": "output",+        "description": "A resistor from this pin to VREF sets the droop (per the datasheet relation with the number of phases n), with recommended maximum of 3.5 V."+      },+      {+        "number": "13",+        "name": "VREF",+        "type": "power_out",+        "description": "1.7-V, 500-µA LDO reference output; bypass to GND with a 0.33-µF ceramic capacitor."+      },+      {+        "number": "14",+        "name": "V3R3",+        "type": "power_out",+        "description": "3.3-V LDO output; bypass to GND with a ceramic capacitor of 1 µF or larger, with recommended range −0.1 V to 3.5 V."+      },+      {+        "number": "15",+        "name": "V5",+        "type": "power_in",+        "description": "5-V power input for all internal analog circuits, with recommended range 4.5 V to 5.5 V; bypass to GND with a ceramic capacitor of 1 µF or larger."+      },+      {+        "number": "16",+        "name": "VIN",+        "type": "power_in",+        "description": "Input voltage supply, also sensed for on-time control and input UVLO, with recommended range 4.5 V to 17 V (12 V nominal)."+      },+      {+        "number": "17",+        "name": "GND",+        "type": "power_in",+        "description": "Ground pin of the controller."+      },+      {+        "number": "18",+        "name": "VR_RDY",+        "type": "output",+        "description": "Open-drain power-good output, typically pulled up to V3R3 through a resistor of 3 kΩ or larger."+      },+      {+        "number": "19",+        "name": "VR_HOT",+        "type": "output",+        "description": "Open-drain, active-low thermal flag output, typically pulled up to V3R3 through a resistor of 3 kΩ or larger; leave floating if not used."+      },+      {+        "number": "20",+        "name": "GND",+        "type": "power_in",+        "description": "Connect to GND; the datasheet notes this is not the IC ground pin."+      },+      {+        "number": "21",+        "name": "RESET",+        "type": "input",+        "description": "Reset input; if held low for more than 1000 ns the controller pulls the output voltage to the VBOOT level, with recommended range −0.1 V to 3.5 V."+      },+      {+        "number": "22",+        "name": "GND",+        "type": "power_in",+        "description": "Connect to GND; the datasheet notes this is not the IC ground pin."+      },+      {+        "number": "23",+        "name": "ENABLE",+        "type": "input",+        "description": "VR enable input with 1-V I/O level and 100-ns debounce, with recommended range −0.1 V to 3.5 V."+      },+      {+        "number": "24",+        "name": "PMB_CLK",+        "type": "input",+        "description": "I²C PMBus clock input supporting 3.3-V and 1.8-V logic levels, with recommended range −0.1 V to 3.5 V."+      },+      {+        "number": "25",+        "name": "PMB_ALERT",+        "type": "output",+        "description": "Open-drain I²C PMBus interrupt line supporting 3.3-V and 1.8-V logic levels."+      },+      {+        "number": "26",+        "name": "PMB_DIO",+        "type": "bidirectional",+        "description": "I²C PMBus digital data I/O line supporting 3.3-V and 1.8-V logic levels, with recommended range −0.1 V to 3.5 V."+      },+      {+        "number": "27",+        "name": "VR_FAULT",+        "type": "output",+        "description": "Open-drain VR fault indicator that goes low on high-side FET short, over-temperature, output overvoltage, or input overcurrent; typically pulled up to V3R3 through 3 kΩ or larger, and left floating if unused."+      },+      {+        "number": "28",+        "name": "ADDR-TRISE",+        "type": "input",+        "description": "Resistor-divider strap to VREF that sets the rise slew rate (bits 2-1), the LSB of the boot voltage (bit 0), and the 4-bit PMBus address, latched at V3R3 power-up."+      },+      {+        "number": "29",+        "name": "SLEW-MODE",+        "type": "input",+        "description": "Resistor-divider strap to VREF that sets one of 8 slew rates and the 4-bit operating mode, latched at V3R3 power-up."+      },+      {+        "number": "30",+        "name": "O-USR",+        "type": "input",+        "description": "Resistor-divider strap to VREF that selects one of seven OSR thresholds or OFF and sets one of seven USR levels or OFF, latched at V3R3 power-up."+      },+      {+        "number": "31",+        "name": "VBOOT",+        "type": "input",+        "description": "Resistor-divider strap to VREF that sets the 7 high bits of the 8-bit VID boot voltage (0.5 V to 2.5 V range), latched at V3R3 power-up."+      },+      {+        "number": "32",+        "name": "F-IMAX",+        "type": "input",+        "description": "Resistor to VREF sets the switching frequency from 300 kHz to 1 MHz, and the voltage sets IMAX via an 8-bit A/D (VF-IMAX = VVREF × IMAX / 255), latched at V3R3 power-up."+      },+      {+        "number": "33",+        "name": "PWM6",+        "type": "output",+        "description": "PWM signal for phase 6 to the power stage, 3.3-V logic: high turns on the high-side MOSFET, low turns on the low-side MOSFET, and tri-state is 1.7 V when both are off."+      },+      {+        "number": "34",+        "name": "PWM5",+        "type": "output",+        "description": "PWM signal for phase 5 to the power stage, 3.3-V logic: high turns on the high-side MOSFET, low turns on the low-side MOSFET, and tri-state is 1.7 V when both are off."+      },+      {+        "number": "35",+        "name": "PWM4",+        "type": "output",+        "description": "PWM signal for phase 4 to the power stage, 3.3-V logic: high turns on the high-side MOSFET, low turns on the low-side MOSFET, and tri-state is 1.7 V when both are off."+      },+      {+        "number": "36",+        "name": "PWM3",+        "type": "output",+        "description": "PWM signal for phase 3 to the power stage, 3.3-V logic: high turns on the high-side MOSFET, low turns on the low-side MOSFET, and tri-state is 1.7 V when both are off."+      },+      {+        "number": "37",+        "name": "PWM2",+        "type": "output",+        "description": "PWM signal for phase 2 to the power stage, 3.3-V logic: high turns on the high-side MOSFET, low turns on the low-side MOSFET, and tri-state is 1.7 V when both are off."+      },+      {+        "number": "38",+        "name": "PWM1",+        "type": "output",+        "description": "PWM signal for phase 1 to the power stage, 3.3-V logic: high turns on the high-side MOSFET, low turns on the low-side MOSFET, and tri-state is 1.7 V when both are off."+      },+      {+        "number": "39",+        "name": "SKIP-NVM",+        "type": "output",+        "description": "A resistor to GND sets pinstrap or NVM configuration mode, can connect to the FCCM pin of the power stage, and is asserted low during soft-start; recommended maximum is 3.5 V."+      },+      {+        "number": "40",+        "name": "TSEN",+        "type": "input",+        "description": "Connect to the TAO/FAULT pin of the power stage to sense the hottest stage temperature and its fault signal; a voltage above 2.5 V is treated as a power-stage fault by default, with recommended range −0.1 V to 5.5 V."+      },+      {+        "number": "41",+        "name": "EP",+        "type": "passive",+        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: The exposed thermal pad (labeled 'Thermal Pad', GND) has no printed number in the datasheet, so it i; The datasheet pin table lists pin 17, 20 and 22 as GND; pins 20 and 22 are noted as 'not IC ground p; SKIP-NVM (pin 39) is listed as 'O' in the datasheet but is also used as a configuration strap resist",+          "exposed pad 41 added from the footprint"+        ],+        "pages_sent": 15,+        "cost_usd": 0.1229,+        "at": "2026-10-07T23:55:34"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/tps53667",+        "pages": 126,+        "sha256": "994fd9ded6c778c5",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 41,+        "described": 41,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "tps53667rtat.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6,+          6,+          1+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "e5b4286c2329085d9ef7f90d5eb5bf41a435241ecc1baaf1383823b6d6a946ae",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "tps53667rtat-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6,+          6,+          1+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "b85e4f9190d5bc1aa4aade464337c55286b65fcf62aace6a8f1151bb5a1a6af6",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file