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TPS53313RGER

Texas Instruments · DC-DC Converters · VQFN-24-EP(4x4)

TPS53313RGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 EN input Enable pin for device on/off control.
2 PG output Power good output flag; open drain output requiring pull-up resistor to external rail.
3 VIN power_in Gate driver supply and power conversion voltage input; 4.5 V to 16 V.
4 VIN power_in Gate driver supply and power conversion voltage input; 4.5 V to 16 V.
5 VIN power_in Gate driver supply and power conversion voltage input; 4.5 V to 16 V.
6 VIN power_in Gate driver supply and power conversion voltage input; 4.5 V to 16 V.
7 PGND power_in Device power ground terminal.
8 PGND power_in Device power ground terminal.
9 PGND power_in Device power ground terminal.
10 PGND power_in Device power ground terminal.
11 PGND power_in Device power ground terminal.
12 PGND power_in Device power ground terminal.
13 SW output Output inductor connection to integrated power devices; switching node.
14 SW output Output inductor connection to integrated power devices; switching node.
15 SW output Output inductor connection to integrated power devices; switching node.
16 SW output Output inductor connection to integrated power devices; switching node.
17 VBST power_in Supply input for high-side MOSFET (bootstrap terminal); connect capacitor from this pin to SW terminal.
18 BP7 power_in Bias supply for internal circuitry and driver.
19 BP3 power_in Input bias supply for analog functions.
20 AGND power_in Device analog ground terminal.
21 RT/SYNC bidirectional Synchronized to external clock; program switching frequency 250 kHz to 1.5 MHz by connecting resistor to GND or connect to external clock source.
22 MODE/SS input Mode configuration pin; connect resistor to GND for mode selection and soft-start time (1 ms, 3 ms, or 6 ms); capacitor selection changes current limit threshold to 4.5 A, 6 A, or 9 A.
23 COMP output Error amplifier compensation terminal; Type III compensation method recommended for stability.
24 FB input Voltage feedback pin for OVP, UVP, and power good determination; voltage range 0 to 3.5 V.
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-24-EP(4x4)
Category Power Management (PMIC)
Pins 25

CAD (KiCad official)

  • Symbol: TPS53313RGER
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: tps53313rger-etched.step / tps53313rger-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps53313rger.step / tps53313rger.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (30 pp, sha256 6fff0f26dd546615, retrieved 2026-10-01, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF