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Contents

README

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TPS53310RGTR

Texas Instruments · DC-DC Converters · VQFN-16-EP(3x3)

TPS53310RGTR from Texas Instruments, in a VQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 EN input Enable input, internally pulled up to VDD with a 1.35-MΩ resistor; the EN logic-high threshold is 1.1 V to 1.3 V (1.18 V typical).
2 SYNC bidirectional Synchronization signal for input interleaving: the master SYNC sends a 180° out-of-phase signal to the slave SYNC, and the SYNC frequency must be within ±20% of the slave nominal frequency.
3 PGD output Power good output flag, open-drain; pull up to an external rail through a resistor, with a pull-down voltage of 0.4 V maximum at 4-mA sink.
4 VBST power_in Supply input for the high-side MOSFET (bootstrap terminal); connect a capacitor from this pin to the SW terminal, with VBST recommended between -0.1 V and 6 V with respect to SW.
5 SW bidirectional Output inductor connection to the integrated power devices; recommended operating range -1 V to 6.5 V.
6 SW bidirectional Output inductor connection to the integrated power devices; recommended operating range -1 V to 6.5 V.
7 SW bidirectional Output inductor connection to the integrated power devices; recommended operating range -1 V to 6.5 V.
8 PS input Operation mode configuration pin with 10-µA pull-up: GND selects forced CCM slave, floating or high selects forced CCM master, and resistors to GND of 24.3 kΩ (DE slave), 57.6 kΩ (HEF mode), 105 kΩ (reserved mode) or 174 kΩ (DE master) select the other modes.
9 COMP output Error amplifier compensation terminal; Type III compensation method is recommended for stability.
10 FB input Voltage feedback input, also used for overvoltage protection, undervoltage protection and power good determination; recommended range -0.1 V to 3.5 V.
11 AGND power_in Device analog ground terminal.
12 VDD power_in Input bias supply for analog functions; 2.9 V to 3.5 V with 3.3 V nominal.
13 VIN power_in Gate driver supply and power conversion voltage; input range 2.9 V to 6 V.
14 VIN power_in Gate driver supply and power conversion voltage; input range 2.9 V to 6 V.
15 PGND power_in Power ground terminal.
16 PGND power_in Power ground terminal.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-16-EP(3x3)
Category Power Management (PMIC)
Pins 17

CAD (KiCad official)

  • Symbol: TPS53310RGTR
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: VQFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: tps53310rgtr-etched.step / tps53310rgtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps53310rgtr.step / tps53310rgtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (29 pp, sha256 917c53c2d5841c00, retrieved 2026-10-08, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF