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Set visibility: public

Ray ·04a3b0bd75 ·11d ago ·parent a507935
1 file changed +11−8
page.json+11−8
@@ -38,19 +38,19 @@         "number": "1",         "name": "TRIP",         "type": "input",-        "description": "OCL threshold setting pin sourcing 10 \u00b5A typical at 25\u00b0C with 4700 ppm/\u00b0C temperature compensation and 0.2 V to 3 V programmable range."+        "description": "OCL threshold setting pin sourcing 10 µA typical at 25°C with 4700 ppm/°C temperature compensation and 0.2 V to 3 V programmable range."       },       {         "number": "2",         "name": "EN",         "type": "input",-        "description": "Enable pin with enable threshold 1.7-1.8 V and disable threshold 0.5 V, requiring 1-k\u03a9 series resistor if source voltage exceeds 5.5 V."+        "description": "Enable pin with enable threshold 1.7-1.8 V and disable threshold 0.5 V, requiring 1-kΩ series resistor if source voltage exceeds 5.5 V."       },       {         "number": "3",         "name": "VFB",         "type": "input",-        "description": "Output feedback input connected to output voltage through resistor divider and compared against 0.6 V internal reference with \u00b10.8% tolerance."+        "description": "Output feedback input connected to output voltage through resistor divider and compared against 0.6 V internal reference with ±0.8% tolerance."       },       {         "number": "4",@@ -68,7 +68,7 @@         "number": "6",         "name": "VDD",         "type": "power_in",-        "description": "Power supply input with operating range 4.5 V to 25 V and typical quiescent current of 420-590 \u00b5A at no load condition."+        "description": "Power supply input with operating range 4.5 V to 25 V and typical quiescent current of 420-590 µA at no load condition."       },       {         "number": "7",@@ -98,7 +98,7 @@         "number": "11",         "name": "DRVL",         "type": "output",-        "description": "Low-side MOSFET gate driver output with 0.5-1.2 \u03a9 on-resistance and 10-35 ns dead-time delay to DRVH."+        "description": "Low-side MOSFET gate driver output with 0.5-1.2 Ω on-resistance and 10-35 ns dead-time delay to DRVH."       },       {         "number": "12",@@ -110,7 +110,7 @@         "number": "13",         "name": "DRVH",         "type": "output",-        "description": "High-side floating MOSFET gate driver output with 0.7-1.8 \u03a9 on-resistance, bootstrap powered between VBST and SW nodes."+        "description": "High-side floating MOSFET gate driver output with 0.7-1.8 Ω on-resistance, bootstrap powered between VBST and SW nodes."       },       {         "number": "14",@@ -128,7 +128,7 @@         "number": "16",         "name": "PGOOD",         "type": "tri_state",-        "description": "Open-drain power-good output flag with 1-ms startup delay rising when output within specified voltage band and 2-\u00b5s delay falling outside band."+        "description": "Open-drain power-good output flag with 1-ms startup delay rising when output within specified voltage band and 2-µs delay falling outside band."       },       {         "number": "17",@@ -214,5 +214,8 @@     "docs/tps53219argtr-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file