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TPS53211RGTR

Texas Instruments · DC-DC Converters · VQFN-16-EP(3x3)

TPS53211RGTR from Texas Instruments, in a VQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCCDR power_in Gate driver bias supply voltage; 4.5V to 7V operating range with 3.32V typical UVLO threshold.
2 LGATE output Low-side gate drive output with 0.33Ω to 0.7Ω source impedance and 0.5Ω to 1Ω sink impedance.
3 PHASE output Output inductor connection point to integrated power devices; DC range -1V to 24V, transient -3V to 28V.
4 BOOT power_in Bootstrap supply input for high-side gate driver; absolute maximum -0.3V to 36V DC, -5V to 7.7V transient <200ns.
5 UGATE output High-side gate drive output; absolute maximum -0.3V to 36V DC, -5V to 7.7V transient <200ns relative to PHASE.
6 PGOOD tri_state Power good flag open-drain output requiring external pull-up resistor; 0.2V to 0.4V pulldown voltage at 4mA sink.
7 EN input Enable control input with 2.2V logic high threshold and 600mV logic low threshold.
8 COMP output Error amplifier compensation terminal output for Type III compensation network design; -0.3V to 3.6V range.
9 FB input Voltage feedback input for output voltage regulation, OVP, UVP and power good determination; -0.3V to 3.6V range.
10 VSEN input Output voltage sense input for overvoltage and undervoltage protection monitoring; -0.1V to 3.3V operating range.
11 FBG power_in Feedback ground reference for output voltage sense divider network.
12 CSN input Current sense negative input for inductor DCR-based overcurrent detection; -0.7V to VCC-1.5V when VCC ≤7.5V.
13 CSP input Current sense positive input for DCR-based overcurrent detection; 20mV typical OCP threshold with thermal compensation.
14 OSC input Frequency programming input via external resistor to ground; programmable switching frequency 250kHz to 1MHz.
15 VCC power_in Analog control circuit supply voltage input; 4.5V to 14V nominal operating range with 4.25V typical UVLO threshold.
16 GND power_in Digital and power ground reference for logic circuits and low-side gate drive return.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-16-EP(3x3)
Category Power Management (PMIC)
Pins 17

CAD (KiCad official)

  • Symbol: TPS53211RGTR
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: VQFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: tps53211rgtr-etched.step / tps53211rgtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps53211rgtr.step / tps53211rgtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (23 pp, sha256 40f7353f3d16f259, retrieved 2026-10-07, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF