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Contents

README

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TPS51218DSCR

Texas Instruments · DC-DC Converters · WSON-10-EP(3x3)

TPS51218DSCR from Texas Instruments, in a WSON-10-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PGOOD output Power-good open-drain output with internal comparator window at 92.5%-107.5% nominal output voltage, 1 mA sink capability at 0.5V, 1 ms turn-on delay and 2 μs turn-off delay.
2 TRIP input Over-current limit threshold setting input with 10 μA sourced current (4700 ppm/°C temperature coefficient), accepting 0.2 V to 3.0 V to establish OCL threshold voltage.
3 EN input Enable control input with 0.5 V disable threshold and 1.8 V enable threshold; pull low to disable device.
4 VFB input Feedback voltage input regulated to 0.7 V nominal within ±0.5-1.6% accuracy over -40°C to 85°C range, with input bias current 0.01-0.2 μA at 0.735 V.
5 RF input Frequency and mode selection input; connect resistor to ground for auto-skip or to PGOOD for forced CCM mode, with resistor values 39kΩ-470kΩ setting switching frequencies 290-430 kHz.
6 DRVL output Ground-referenced low-side gate driver output with 0.5-2.2 Ω output impedance and 30 ns maximum dead-time specification before DRVH turn-on.
7 V5IN power_in 5 V auxiliary supply input specified 4.5-6.5 V nominally, with typical supply current 320-500 μA under load and 1 μA in shutdown.
8 SW bidirectional Switching node for external high-side MOSFET drain connection, serving as gate drive return path, minimum on-time ramp reference source, and active output discharge path.
9 DRVH output High-side floating gate driver output with gate drive voltage determined by VBST-to-SW bootstrap capacitor voltage, 1.5-3 Ω source impedance, and 35 ns maximum dead-time before DRVL turn-on.
10 VBST power_in Bootstrap supply terminal for high-side gate driver requiring 10-100 μF external flying capacitor connection from VBST to SW pin, internally connected to V5IN through bootstrap MOSFET.
11 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-10-EP(3x3)
Category Power Management (PMIC)
Pins 11

CAD (KiCad official)

  • Symbol: TPS51218DSCR
  • Footprint: Package_SON:VSON-10-1EP_3x3mm_P0.5mm_EP1.2x2mm
  • 3D model: WSON-10-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: tps51218dscr-etched.step / tps51218dscr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps51218dscr.step / tps51218dscr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (30 pp, sha256 a4e19df548ae6c94, retrieved 2026-10-03, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF