# TPS51125RGET

**Texas Instruments** · DC-DC Converters · VQFN-24-EP(4x4)

TPS51125RGET from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ENTRIP1 | bidirectional | Channel 1 enable and overcurrent trip-setting pin: connect a resistor from this pin to GND to set the synchronous RDS(on) sense threshold, and short it to ground to shut down switcher channel 1. |
| 2 | VFB1 | input | Channel 1 SMPS feedback input, connected to the feedback resistor divider. |
| 3 | VREF | power_in | 2-V reference voltage output; connect a 220-nF to 1-µF ceramic capacitor to signal GND near the device. |
| 4 | TONSEL | input | On-time adjustment input: connect to VREG5 for 365/460 kHz, VREG3 for 300/375 kHz, VREF for 245/305 kHz, or GND for 200/250 kHz. |
| 5 | VFB2 | input | Channel 2 SMPS feedback input, connected to the feedback resistor divider. |
| 6 | ENTRIP2 | bidirectional | Channel 2 enable and overcurrent trip-setting pin: connect a resistor to GND to set the synchronous RDS(on) sense threshold, and short it to ground to shut down switcher channel 2. |
| 7 | VO2 | bidirectional | Output connection to the channel 2 SMPS; works as a fixed voltage input and output discharge input, and as the 3.3-V switch-over return power input. |
| 8 | VREG3 | power_out | 3.3-V power supply output; connect a 10-µF ceramic capacitor to power GND near the device (a 1-µF ceramic is acceptable when not loaded). |
| 9 | VBST2 | input | Supply input (boost terminal) for the channel 2 high-side N-channel MOSFET driver. |
| 10 | DRVH2 | output | Channel 2 high-side N-channel MOSFET driver output, referenced to LL2; recommended range -0.8 V to 34 V (-0.1 V to 5.5 V with respect to LL2). |
| 11 | LL2 | input | Switch-node connection for the channel 2 high-side driver, current limit and control circuitry; recommended range -1.8 V to 28 V. |
| 12 | DRVL2 | output | Channel 2 low-side N-channel MOSFET driver output, referenced to GND; recommended range -0.1 V to 5.5 V. |
| 13 | EN0 | bidirectional | Master enable: open enables both LDOs with VCLK and switcher channels ready to start; 620 kΩ to GND enables both LDOs with VCLK off; GND disables all circuits. |
| 14 | SKIPSEL | input | Operation mode selection input: connect to VREG3 or VREG5 for Out-of-Audio (OOA) auto-skip operation, or to VREF for auto-skip operation; recommended range -0.1 V to 5.5 V. |
| 15 | GND | power_in | Ground. |
| 16 | VIN | power_in | High-voltage power supply input for the 5-V/3.3-V LDOs; supply voltage range 5.5 V to 28 V. |
| 17 | VREG5 | power_out | 5-V power supply output; connect a 33-µF ceramic capacitor to power GND near the device. |
| 18 | VCLK | output | 270-kHz clock output for driving an external 15-V charge pump; recommended range -0.1 V to 5.5 V. |
| 19 | DRVL1 | output | Channel 1 low-side N-channel MOSFET driver output, referenced to GND; recommended range -0.1 V to 5.5 V. |
| 20 | LL1 | input | Switch-node connection for the channel 1 high-side driver, current limit and control circuitry; recommended range -1.8 V to 28 V. |
| 21 | DRVH1 | output | Channel 1 high-side N-channel MOSFET driver output, referenced to LL1; recommended range -0.8 V to 34 V (-0.1 V to 5.5 V with respect to LL1). |
| 22 | VBST1 | input | Supply input (boost terminal) for the channel 1 high-side N-channel MOSFET driver. |
| 23 | PGOOD | output | Power-good window comparator output for channels 1 and 2 (logical AND); recommended range -0.1 V to 5.5 V. |
| 24 | VO1 | bidirectional | Output connection to the channel 1 SMPS; works as a fixed voltage input and output discharge input, and as the 5-V switch-over return power input. |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-24-EP(4x4) |
| Category | Power Management (PMIC) |
| Pins | 25 |

## CAD (KiCad official)

- Symbol: `TPS51125RGET`
- Footprint: `Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm`
- 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
- 3D model files: `tps51125rget-etched.step` / `tps51125rget-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps51125rget.step` / `tps51125rget.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps51125) (39 pp, sha256 `8043bf8334bf05d1`, retrieved 2026-10-10, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tps51125rget-datasheet.pdf)