component

TPS51124RGER

Public Made by Adom

by adom

Texas Instruments DC-DC Converters, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TPS51124RGER

Texas Instruments · DC-DC Converters · VQFN-24-EP(4x4)

TPS51124RGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VO1 input Channel 1 output connection for feedback and discharge control.
2 VFB1 input Channel 1 voltage feedback input; connect with resistor divider from output to GND.
3 GND power_in Signal ground reference for control circuit.
4 TONSEL input On-time frequency selection input pin.
5 VFB2 input Channel 2 voltage feedback input; connect with resistor divider from output to GND.
6 VO2 input Channel 2 output connection for feedback and discharge control.
7 PGOOD2 output Channel 2 power-good open-drain output (5 mA capability); goes high 0.5 ms after VFB within limits and low within 10 μs on fault.
8 EN2 input Channel 2 enable input; connect to 5 V or 3.3 V to turn on SMPS.
9 VBST2 power_in Channel 2 high-side driver boost supply with internal PN diode from V5IN; connect capacitor to LL2.
10 DRVH2 output Channel 2 high-side gate driver output with floating reference to LL2; gate voltage defined by VBST2 to LL2 capacitor.
11 LL2 bidirectional Channel 2 switch node connection for high-side driver return; serves as feedback to current comparators and on-time control.
12 DRVL2 output Channel 2 low-side gate driver output referenced to PGND; gate voltage defined by V5IN.
13 PGND2 power_in Channel 2 power ground return for low-side drivers and current comparator input; output discharge current flows through this pin.
14 TRIP2 input Channel 2 overcurrent trip threshold input; connect resistor to GND to set RDS(on) sense voltage.
15 V5FILT power_in Filtered 5 V supply for control circuit except gate drivers; connect RC low-pass filter from V5IN.
16 V5IN power_in 5 V supply for FET gate drivers from 4.5 V to 5.5 V; internally connected to VBSTx via PN diodes.
17 TRIP1 input Channel 1 overcurrent trip threshold input; connect resistor to GND to set RDS(on) sense voltage.
18 PGND1 power_in Channel 1 power ground return for low-side drivers and current comparator input; output discharge current flows through this pin.
19 DRVL1 output Channel 1 low-side gate driver output referenced to PGND; gate voltage defined by V5IN.
20 LL1 bidirectional Channel 1 switch node connection for high-side driver return; serves as feedback to current comparators and on-time control.
21 DRVH1 output Channel 1 high-side gate driver output with floating reference to LL1; gate voltage defined by VBST1 to LL1 capacitor.
22 VBST1 power_in Channel 1 high-side driver boost supply with internal PN diode from V5IN; connect capacitor to LL1.
23 EN1 input Channel 1 enable input; connect to 5 V or 3.3 V to turn on SMPS.
24 PGOOD1 output Channel 1 power-good open-drain output (5 mA capability); goes high 0.5 ms after VFB within limits and low within 10 μs on fault.
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-24-EP(4x4)
Category Power Management (PMIC)
Pins 25

CAD (KiCad official)

  • Symbol: TPS51124RGER
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: tps51124rger-etched.step / tps51124rger-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps51124rger.step / tps51124rger.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (29 pp, sha256 d4b93b07db96842d, retrieved 2026-10-07, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF