component
TPS51116MPWPREP
Public Made by Adomby adom
Texas Instruments Power Management - Specialized, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownTPS51116MPWPREP
Texas Instruments · Power Management - Specialized · HTSSOP-20-EP
TPS51116MPWPREP from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VLDOIN | input | Power supply for the VTT LDO, with a recommended range of -0.1 V to 3.6 V. |
| 2 | VTT | output | Power output of the 1 A VTT LDO, whose output voltage is sensed at VTTSNS. |
| 3 | VTTGND | power_in | Power ground output for the VTT LDO, with a recommended range of -0.1 V to 0.1 V. |
| 4 | VTTSNS | input | Voltage sense input for the VTT LDO, connected to the plus terminal of the VTT LDO output capacitor, with a recommended range of -0.1 V to 3.6 V. |
| 5 | GND | power_in | Signal ground, connected to the minus terminal of the VTT LDO output capacitor. |
| 6 | MODE | input | Discharge mode select: connect to V5IN for no discharge, to VDDQ for tracking discharge, or to GND for non-tracking discharge; recommended range is -0.1 V to 5.25 V. |
| 7 | VTTREF | output | Buffered VTTREF reference output, with a recommended range of -0.1 V to 1.8 V. |
| 8 | COMP | bidirectional | Output of the transconductance amplifier for phase compensation; connect to V5IN to disable the gm amplifier and use D-CAP mode, with a recommended range of -0.1 V to 5.25 V. |
| 9 | VDDQSNS | bidirectional | VDDQ output voltage feedback input when VDDQSET is connected to V5IN or GND, and discharge current sink terminal for non-tracking discharge; recommended range is -0.1 V to 3.6 V. |
| 10 | VDDQSET | input | VDDQ output voltage setting pin; connect to V5IN or GND for the internal divider, or use an external divider, with a recommended range of -0.1 V to 5.25 V. |
| 11 | S3 | input | S3 signal input; with S5 low, it causes discharge of VDDQ, VTTREF and VTT, with a recommended range of -0.1 V to 5.25 V. |
| 12 | S5 | input | S5 signal input; with S3 low, it causes discharge of VDDQ, VTTREF and VTT, with a recommended range of -0.1 V to 5.25 V. |
| 13 | PGOOD | output | Open-drain powergood output, HIGH when the VDDQ output voltage is within the target range, with a recommended range of -0.1 V to 5.25 V. |
| 14 | V5IN | input | 5 V power supply input for internal circuits and MOSFET gate drivers; recommended supply range is 4.75 V to 5.25 V. |
| 15 | CS | bidirectional | Current-sense comparator negative input for resistor sensing, or overcurrent trip setting input for RDS(on) sensing when connected to V5IN through a voltage-setting resistor; recommended range is -0.1 V to 5.25 V. |
| 16 | PGND | power_in | Ground for the bottom MOSFET gate driver, also the positive current-sense comparator input and the powergood circuit ground, with a recommended range of -0.1 V to 0.1 V. |
| 17 | DRVL | output | Bottom (rectifying) MOSFET gate drive output; recommended range is -0.1 V to 5.25 V. |
| 18 | LL | bidirectional | Switching (top) MOSFET gate driver return and negative current-sense input for RDS(on) sensing, with a recommended range of -0.6 V to 28 V. |
| 19 | DRVH | output | Switching (top) MOSFET gate drive output; recommended range is -0.1 V to 34 V. |
| 20 | VBST | bidirectional | Bootstrap voltage input for the switching (top) MOSFET driver; recommended range is -0.1 V to 34 V. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-20-EP |
| Category | Power Management (PMIC) |
| Pins | 21 |
CAD (KiCad official)
- Symbol:
TPS51116MPWPREP - Footprint:
Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm - 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
tps51116mpwprep-etched.step/tps51116mpwprep-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps51116mpwprep.step/tps51116mpwprep.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (40 pp, sha256
dca73005a4f4cdd4, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).