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TPS5103IDBR

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Texas Instruments DC-DC Converters, SSOP-20-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TPS5103IDBR

Texas Instruments · DC-DC Converters · SSOP-20-208mil

TPS5103IDBR from Texas Instruments, in a SSOP-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SOFTSTART input External capacitor from SOFTSTART to GND sets the soft-start timing for the controller.
2 INV input Inverting input of both the error amplifier and the hysteretic comparator.
3 FB output Feedback output of the error amplifier, brought out for loop-gain compensation.
4 CT bidirectional External capacitor from CT to GND adjusts the triangle oscillator and decreases the current-limiting voltage; the capacitor may be left open or added to adjust the overcurrent reset frequency.
5 RT bidirectional External resistor connection for adjusting the triangle oscillator frequency; connecting RT to VREF5 selects hysteretic mode.
6 GND power_in Control ground for the controller circuitry.
7 REF output 1.185 V reference voltage output used for output-voltage setting and voltage protection (COMP).
8 COMP input Comparator input for voltage monitoring, also used for input undervoltage protection; its inverting terminal is internally tied to REF (1.185 V).
9 PWM/SKIP input Mode select: low selects PWM mode and high selects SKIP mode.
10 STBY input Standby control input.
11 VREG5V_IN input External 5-V input; input voltage range is 4.5 V to 25 V.
12 VREF5 output Output of the internal 5-V linear regulator used for the high-side driver bootstrap voltage, with a stated tolerance of 6%.
13 VCC power_in Supply-voltage input for the controller.
14 VCC_SENSE input Supply-voltage sense for current protection, sensing the high-side MOSFET drain-to-source drop together with LL.
15 TRIP input External resistor connection that sets the output-current limit (overcurrent threshold) with an internal current source of 15 µA in PWM mode and 5 µA in SKIP mode.
16 OUTGND power_in Ground for the FET drivers, return for OUT_u and OUT_d gate-drive outputs.
17 OUT_d bidirectional Gate-drive output for the low-side power switching FET.
18 LL bidirectional Bootstrap low: high-side gate-driving return and output-current protection; connect to the junction of the high-side and low-side FETs for floating drive.
19 OUT_u output Gate-drive output for the high-side power switching FET; the maximum voltage between OUT_u and LL is limited to 5 V.
20 LH bidirectional Bootstrap pin: connect a 1 µF, low-ESR capacitor from LH to LL; the maximum voltage between LH and OUTGND is 30 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SSOP-20-208mil
Category Power Management (PMIC)
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 4.5 25 V 6
Input voltage (INV, CT, RT, COMP, PWM/SKIP, SOFTSTART) VI 6 V 6
Input voltage VREG5V_IN VI 5.5 V 6
Input voltage STBY VI 12 V 6
Input voltage TRIP, VCC_SENSE VI 25 V 6
Operating temperature range TA -40 85 °C 6
Supply voltage VCC VCC -0.3 27 V see Note 1 6
Input voltage INV, CT, RT, PWM/SKIP, SOFTSTART, COMP VI -0.3 7 V 6
Input voltage VREG5V_IN VI -0.3 6 V 6
Input voltage STBY VI -0.3 15 V 6
Input voltage TRIP, VCC_SENSE VI -0.3 27 V 6
Output current IO 3 A 6
Low-level output voltage VOL -0.3 27 V 6
High-level output voltage VOH -0.3 32 V 6
Reference voltage Vref -0.3 3 V 6
Operating free-air temperature range TA -40 85 °C 6
Storage temperature range Tstg -55 150 °C 6
Power rating, DB package 801 mW TA ≤ 25°C 6
Power rating, DB package 416 mW TA = 85°C 6
Reference voltage Vref 1.167 1.185 1.203 V TA = 25°C, Ivref = 50 µA 7
Reference voltage over temperature Vref 1.155 1.215 V Ivref = 50 µA 7
High-level output voltage (DC) VOH 1 1.1 1.2 V DC; includes internal comparator error 7
Low-level output voltage (DC) VOL 0.4 0.5 0.6 V DC; includes internal comparator error 7
Hysteresis window Vhys 6 9.7 13 mV Hysteretic mode 7
5-V regulator output voltage VO 4.7 5.3 V I = 10 mA 8
5-V switch threshold voltage (high) VIT(high) 4.2 4.9 V 8
5-V switch threshold voltage (low) VIT(low) 4.1 4.8 V 8
5-V switch hysteresis Vhys 50 150 250 mV 8
UVLO threshold voltage (high) VIT(high) 3.6 4.2 V 8
UVLO threshold voltage (low) VIT(low) 3.5 4.1 V 8
TRIP terminal current, PWM mode ITRIP 10 15 20 µA PWM mode, V(TRIP) = 7 V 8
TRIP terminal current, SKIP mode ITRIP 3 5 7 µA SKIP mode, V(TRIP) = 7 V 8
Softstart current I(CTRL) 1.9 2.5 3 µA 9
Output voltage monitor threshold voltage VIT 1.08 1.18 1.28 V 9

CAD (KiCad official)

  • Symbol: TPS5103IDBR
  • Footprint: Package_SO:SSOP-20_5.3x7.2mm_P0.65mm
  • 3D model: SSOP-20-208mil (KiCad packages3D, STEP)
  • 3D model files: tps5103idbr-etched.step / tps5103idbr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps5103idbr.step / tps5103idbr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (41 pp, sha256 dc4faf0f8eb87b52, retrieved 2026-10-07, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF