component
TPS5103IDBR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SSOP-20-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+56@@ -0,0 +1,56 @@+# TPS5103IDBR++**Texas Instruments** · DC-DC Converters · SSOP-20-208mil++TPS5103IDBR from Texas Instruments, in a SSOP-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | SOFTSTART | input | External capacitor from SOFTSTART to GND sets the soft-start timing for the controller. |+| 2 | INV | input | Inverting input of both the error amplifier and the hysteretic comparator. |+| 3 | FB | output | Feedback output of the error amplifier, brought out for loop-gain compensation. |+| 4 | CT | bidirectional | External capacitor from CT to GND adjusts the triangle oscillator and decreases the current-limiting voltage; the capacitor may be left open or added to adjust the overcurrent reset frequency. |+| 5 | RT | bidirectional | External resistor connection for adjusting the triangle oscillator frequency; connecting RT to VREF5 selects hysteretic mode. |+| 6 | GND | power_in | Control ground for the controller circuitry. |+| 7 | REF | output | 1.185 V reference voltage output used for output-voltage setting and voltage protection (COMP). |+| 8 | COMP | input | Comparator input for voltage monitoring, also used for input undervoltage protection; its inverting terminal is internally tied to REF (1.185 V). |+| 9 | PWM/SKIP | input | Mode select: low selects PWM mode and high selects SKIP mode. |+| 10 | STBY | input | Standby control input. |+| 11 | VREG5V_IN | input | External 5-V input; input voltage range is 4.5 V to 25 V. |+| 12 | VREF5 | output | Output of the internal 5-V linear regulator used for the high-side driver bootstrap voltage, with a stated tolerance of 6%. |+| 13 | VCC | power_in | Supply-voltage input for the controller. |+| 14 | VCC_SENSE | input | Supply-voltage sense for current protection, sensing the high-side MOSFET drain-to-source drop together with LL. |+| 15 | TRIP | input | External resistor connection that sets the output-current limit (overcurrent threshold) with an internal current source of 15 µA in PWM mode and 5 µA in SKIP mode. |+| 16 | OUTGND | power_in | Ground for the FET drivers, return for OUT_u and OUT_d gate-drive outputs. |+| 17 | OUT_d | bidirectional | Gate-drive output for the low-side power switching FET. |+| 18 | LL | bidirectional | Bootstrap low: high-side gate-driving return and output-current protection; connect to the junction of the high-side and low-side FETs for floating drive. |+| 19 | OUT_u | output | Gate-drive output for the high-side power switching FET; the maximum voltage between OUT_u and LL is limited to 5 V. |+| 20 | LH | bidirectional | Bootstrap pin: connect a 1 µF, low-ESR capacitor from LH to LL; the maximum voltage between LH and OUTGND is 30 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SSOP-20-208mil |+| Category | Power Management (PMIC) |+| Pins | 20 |++## CAD (KiCad official)++- Symbol: `TPS5103IDBR`+- Footprint: `Package_SO:SSOP-20_5.3x7.2mm_P0.65mm`+- 3D model: SSOP-20-208mil (KiCad packages3D, STEP)+- 3D model files: `tps5103idbr-etched.step` / `tps5103idbr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps5103idbr.step` / `tps5103idbr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps5103) (41 pp, sha256 `dc4faf0f8eb87b52`, retrieved 2026-10-07, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps5103idbr-datasheet.pdf)
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the capacitor may be left open or added to adjust the overcurrent reset frequency."+ },+ {+ "number": "5",+ "name": "RT",+ "type": "bidirectional",+ "description": "External resistor connection for adjusting the triangle oscillator frequency; connecting RT to VREF5 selects hysteretic mode."+ },+ {+ "number": "6",+ "name": "GND",+ "type": "power_in",+ "description": "Control ground for the controller circuitry."+ },+ {+ "number": "7",+ "name": "REF",+ "type": "output",+ "description": "1.185 V reference voltage output used for output-voltage setting and voltage protection (COMP)."+ },+ {+ "number": "8",+ "name": "COMP",+ "type": "input",+ "description": "Comparator input for voltage monitoring, also used for input undervoltage protection; its inverting terminal is internally tied to REF (1.185 V)."+ },+ {+ "number": "9",+ "name": "PWM/SKIP",+ "type": "input",+ "description": "Mode select: low selects PWM mode and high selects SKIP mode."+ },+ {+ "number": "10",+ "name": "STBY",+ "type": "input",+ "description": "Standby control input."+ },+ {+ "number": "11",+ "name": "VREG5V_IN",+ "type": "input",+ "description": "External 5-V input; input voltage range is 4.5 V to 25 V."+ },+ {+ "number": "12",+ "name": "VREF5",+ "type": "output",+ "description": "Output of the internal 5-V linear regulator used for the high-side driver bootstrap voltage, with a stated tolerance of 6%."+ },+ {+ "number": "13",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply-voltage input for the controller."+ },+ {+ "number": "14",+ "name": "VCC_SENSE",+ "type": "input",+ "description": "Supply-voltage sense for current protection, sensing the high-side MOSFET drain-to-source drop together with LL."+ },+ {+ "number": "15",+ "name": "TRIP",+ "type": "input",+ "description": "External resistor connection that sets the output-current limit (overcurrent threshold) with an internal current source of 15 µA in PWM mode and 5 µA in SKIP mode."+ },+ {+ "number": "16",+ "name": "OUTGND",+ "type": "power_in",+ "description": "Ground for the FET drivers, return for OUT_u and OUT_d gate-drive outputs."+ },+ {+ "number": "17",+ "name": "OUT_d",+ "type": "bidirectional",+ "description": "Gate-drive output for the low-side power switching FET."+ },+ {+ "number": "18",+ "name": "LL",+ "type": "bidirectional",+ "description": "Bootstrap low: high-side gate-driving return and output-current protection; connect to the junction of the high-side and low-side FETs for floating drive."+ },+ {+ "number": "19",+ "name": "OUT_u",+ "type": "output",+ "description": "Gate-drive output for the high-side power switching FET; the maximum voltage between OUT_u and LL is limited to 5 V."+ },+ {+ "number": "20",+ "name": "LH",+ "type": "bidirectional",+ "description": "Bootstrap pin: connect a 1 µF, low-ESR capacitor from LH to LL; the maximum voltage between LH and OUTGND is 30 V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The mechanical drawing on page 36 is the generic DB outline labelled '28 PINS SHOWN'; no 20-pin-spec; Pin types for OUT_d, LL, LH and CT/RT are datasheet 'I/O' and were mapped to KiCad bidirectional; OU"+ ],+ "pages_sent": 10,+ "cost_usd": 0.0613,+ "at": "2026-10-07T22:46:42"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps5103",+ "pages": 41,+ "sha256": "dc4faf0f8eb87b52",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 20,+ "described": 20,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tps5103idbr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7.8,+ 7.2,+ 2.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "c9a01a276d0b4d9561efd58f2fcee56f52c1b6ab464ea7a0380cab4e87a924e6",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tps5103idbr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7.8,+ 7.2,+ 2.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "3c5532f89e6137c25296de6a267612621a31eddc079dd594cdb88d8873e27460",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}