main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 19d ago
viewers tps43000pwr: viewers · Ray 19d ago
package.json Publish 0.1.0 · Ray 19d ago
page.json tps43000pwr: specified limits as data (metadata.characteristics, 59 rows from the datasheet) · Ray 16d ago
README.md tps43000pwr: specified limits as data (metadata.characteristics, 59 rows from the datasheet) · Ray 16d ago
tps43000pwr-etched.glb tps43000pwr: factory component page (tier=mfr) · Ray 19d ago
tps43000pwr-etched.step tps43000pwr: factory component page (tier=mfr) · Ray 19d ago
tps43000pwr-hero.glb tps43000pwr: hero GLB from the etched model (keeps the MPN mark) · Ray 19d ago
tps43000pwr-hero.overlay.json Publish 0.1.0 · Ray 19d ago
tps43000pwr.glb Publish 0.1.0 · Ray 19d ago
tps43000pwr.kicad_mod Publish 0.1.0 · Ray 19d ago
tps43000pwr.kicad_sym Publish 0.1.0 · Ray 19d ago
tps43000pwr.lbr Publish 0.1.0 · Ray 19d ago
tps43000pwr.step Publish 0.1.0 · Ray 19d ago

TPS43000PWR

Texas Instruments · DC-DC Converters · TSSOP-16

TPS43000PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SYNC/SD input Dual-function pin that synchronizes the oscillator to a 0 V to 2 V pulse at least 100 ns wide, or shuts down the controller and both MOSFETs when held at 2 V or greater for over 35 µs.
2 CCS input Connecting this pin to VIN selects pulse-by-pulse current limiting, and connecting it to ground enables hiccup-mode overcurrent protection.
3 RT output A resistor from this pin to ground sets the PWM frequency.
4 CCM input Pulling this pin high forces continuous conduction mode by ignoring the Izero comparator, while grounding it enables discontinuous conduction mode, and even when high, seven detected Izero pulses still initiate PFM mode.
5 BUCK input Connect to VIN for a buck converter or ground for a boost or SEPIC; it configures the gate drive logic and controls DMAX, and has a weak internal pulldown.
6 PFM input Connecting this pin to VIN disables PFM mode, and grounding it enables automatic PFM operation based on Izero.
7 COMP output Output of the error amplifier, with compensation components connected from this pin to FB, and it goes to high impedance during sleep mode.
8 FB input Inverting input to the error amplifier, connected to a resistor divider off VOUT and to the compensation network.
9 VIN power_in Input supply for the device that provides power to the device and may be used for the N-channel gate drive, and it needs good local decoupling.
10 VOUT output Connect to the power supply output; it may be used for the gate drive to the N-channel MOSFET and needs good local decoupling.
11 NDRV output Gate drive output for the N-channel MOSFET (energizing MOSFET for boost and SEPIC, rectifier MOSFET for buck).
12 GND power_in Ground pin for the device.
13 PDRV output Gate drive output for the P-channel MOSFET (energizing MOSFET for buck, rectifier MOSFET for boost and SEPIC).
14 VP power_in Power rail input for the P-channel MOSFET gate driver, connected to VIN for buck or to VOUT for boost or SEPIC, with good local decoupling.
15 SWP input Connect through a 1-kΩ resistor to the drain of the P-channel MOSFET for all topologies, where it detects Izero pulses using the synchronous rectifier MOSFET; SEPIC requires a Schottky clamp tied to ground on this pin.
16 SWN input Connect through a 1-kΩ resistor to the drain of the N-channel MOSFET for all topologies, where it senses overcurrent using the inductor energizing MOSFET.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Power Management (PMIC)
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage (VIN, VP, VOUT) VIN, VP, VOUT -0.3 10 V 2
Input voltage (BUCK, CCM, CCS, PFM, SYNC/SD); max printed as VIN + 0.3 V BUCK, CCM, CCS, PFM, SYNC/SD -0.3 V 2
Input voltage (SWN) SWN -0.3 17 V 2
Input voltage (SWP); max printed as VIN + 0.3 V SWP -0.3 V 2
Storage temperature range Tstg -65 150 °C 2
Junction temperature range TJ -55 150 °C 2
Lead temperature 300 °C 1,6 mm (1/16 inch) from case for 10 seconds 2
Input voltage, VIN, VP VIN, VP 9 V 2
Input voltage, VOUT VOUT 8 V 2
Input voltage, BUCK, CCM, CCS, PFM, SYNC/SD, SWP BUCK, CCM, CCS, PFM, SYNC/SD, SWP 9 V 2
Input voltage, SWN SWN 17 V 2
Operating junction temperature range TJ -40 85 °C 2
Start-up voltage 1.45 1.65 1.85 V VP = VOUT = 3.5 V, No load 3
Undervoltage lockout (UVLO) hysteresis 60 150 300 mV VP = VOUT = 3.5 V, No load; No MOSFETs connected 3
Shutdown current (VIN) 1 10 µA SYNC/SD = 1.6 V 3
Shutdown current (VIN) 0.5 2 µA SYNC/SD = VIN 3
Operating current (VIN) 1 1.4 mA Not in PFM mode, no MOSFETs connected 3
Sleep mode current (VIN) 75 140 µA PFM mode, COMP/FB=900 mV 3
Shutdown current (VOUT) 0 2 µA SYNC/SD = VIN 3
Operating current (VOUT) 1 5 µA Not in PFM mode, no MOSFETs connected 3
Sleep mode current (VOUT) 0 2 µA PFM mode, COMP/FB=900 mV 3
Shutdown current (VP) 0.5 2 µA SYNC/SD = VIN 3
Operating current (VP) 500 800 µA Not in PFM mode, no MOSFETs connected 3
Sleep mode current (VP) 0 2 µA PFM mode, COMP/FB=900 mV 3
VREG, regulation voltage (COMP/FB pin) VREG 784 800 816 mV 1.8 V < VIN < 6 V 3
VREG, regulation voltage (COMP/FB pin) VREG 788 800 812 mV VIN = 3.5 V 3
FB input current -150 -10 150 nA VFB = 800 mV 3
Sourcing current (out of COMP) -2 -0.5 mA VFB = (VREG − 100 mV), VCOMP = 0 V 3
Sinking current (into COMP) 0.5 1.2 mA VFB = (VREG + 100 mV), VCOMP = 2 V 3
Soft-start time 1 3 6 ms RT = 37.5 kΩ (1 MHz) 4
Soft-start time 2 5.5 12 ms RT = 75 kΩ (500 kHz) 4
Soft-start time 4 10.5 24 ms RT = 150 kΩ (250 kHz) 4
Oscillator frequency 0.9 1 1.1 MHz RT = 37.5 kΩ (1 MHz), VCOMP = 600 mV 4
Oscillator frequency 450 500 550 kHz RT = 75 kΩ (500 kHz), VCOMP = 600 mV 4
Oscillator frequency 225 250 280 kHz RT = 150 kΩ (250 kHz), VCOMP = 600 mV 4
Synchronization threshold voltage 0.8 1.25 1.6 V 4
SYNC pulse width (only the 100 ns value placed as min; second printed value 50 ns not placed) 100 ns SYNC/SD = 2 V, COMP/FB=600 mV 4
Hiccup overcurrent threshold voltage 175 250 325 mV Voltage measured from VIN to SWN 4
BOOST configured hiccup overcurrent threshold voltage 175 250 325 mV Voltage measured from SWN to GND, BUCK grounded 4
CCS threshold voltage 0.4 0.7 1 V Constant current source configured if 4
CCS current threshold voltage 85 150 225 mV Measured from VIN to SWN 4
Consecutive overcurrent clock cycles before shutdown 50 63 75 clock cycles 4
BUCK threshold voltage 0.4 0.7 1 V BUCK configured if VBUCK > 1 V 5
BUCK maximum duty cycle (single printed value placed in max column) 100 % VFB = 0 V 5
BOOST maximum duty cycle 70 90 % BUCK grounded, VFB = 0 V 5
Minimum duty cycle (single printed value placed in min column) 0 % VFB = 2 V 5
CCM threshold voltage 0.4 0.7 1 V Continuous conduction allowed if 5
BUCK rectifier zero current threshold voltage -28 -12 0 mV Measured from SWP to GND 5
PFM threshold voltage 0.4 0.7 1 V PFM mode not allowed if PFM > 1 V 5
FB voltage to awaken (exit sleep mode) 768 784 800 mV 5
VOUT threshold voltage to enter low power mode 3.45 3.6 3.8 V VP = VIN = 5 V 5
VIN threshold voltage to enter low power mode 3.45 3.6 3.8 V VP = VOUT = 5 V, BUCK grounded (boost configured) 5
Hysteresis voltage to exit low power mode 225 312 415 mV VOUT < (VTHRESHOLD−VHYST), VP = VIN = 5 V 5
VIN driven rise time 25 45 ns CO = 1 nF, VP = VIN = 5 V, 6
VIN driven pull-up resistance 6.5 10 Ω VP = VIN = 5 V, VOUT = 3.1 V 6
VOUT driven pull-up resistance 6.5 10 Ω VP = VOUT = VIN = 5 V, LP mode activated 6
VP driven rise time 15 40 ns VP = VIN = 5 V, VOUT = 3.1 V 6
VP driven fall time 15 40 ns CO = 1 nF 6
VP driven pull-up resistance 2.5 4 Ω VP = VIN = 5 V, VOUT = 3.1 V 6

CAD (KiCad official)

  • Symbol: TPS43000PWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: tps43000pwr-etched.step / tps43000pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps43000pwr.step / tps43000pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (33 pp, sha256 1e352c652c685ffe, retrieved 2026-10-12, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF