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Initial commit: component/tps40200dr

Ray ·136b15eca9 ·1mo ago
2 files changed +185
README.mdadded+44
@@ -0,0 +1,44 @@+# TPS40200DR++**Texas Instruments** · DC-DC Converters · SOIC-8++TPS40200DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | RC | input | Switching frequency setting input via external RC network for operation between 35 kHz and 500 kHz, or external clock synchronization input with pulse amplitude greater than VIN/10 and minimum 150 mV trigger threshold. |+| 2 | SS | input | Soft-start programming input; external capacitor to GND determines soft-start interval; voltage pulled below 150 mV disables switching and places device in shutdown state. |+| 3 | COMP | output | Error amplifier output for control loop compensation network connection to FB pin. |+| 4 | FB | input | Error amplifier inverting input; connect feedback resistor network center tap to establish regulated output voltage. |+| 5 | GND | power_in | Device ground reference. |+| 6 | GDRV | output | Gate driver output for external P-channel MOSFET; output voltage 6 V to 10 V with pull-up current 125-300 mA and pull-down current 200-300 mA. |+| 7 | ISNS | input | Current-sense comparator input with 100 mV nominal threshold; connect current sense resistor between ISNS and VDD to set overcurrent protection level. |+| 8 | VDD | power_in | System power supply input operating range 4.5 V to 52 V; local bypass capacitor to GND required for proper operation. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-8 |+| Category | Power Management (PMIC) |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `TPS40200DR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `tps40200dr-etched.step` / `tps40200dr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps40200dr.step` / `tps40200dr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tps40200.pdf) (52 pp, sha256 `a3e23ec7367038ec`, retrieved 2026-09-24, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps40200dr-datasheet.pdf)
page.jsonadded+141
@@ -0,0 +1,141 @@+{+  "slug": "tps40200dr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments DC-DC Converters, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "tps40200dr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "tps40200dr.kicad_sym",+    "tps40200dr.kicad_mod",+    "tps40200dr.glb",+    "tps40200dr.step",+    "tps40200dr.lbr",+    "docs/hero.png",+    "docs/tps40200dr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "TPS40200DR",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-8",+    "pin_count": 8,+    "category": "Power Management (PMIC)",+    "subcategory": "DC-DC Converters",+    "datasheet": "https://www.ti.com/lit/ds/symlink/tps40200.pdf",+    "parts": {+      "symbol": "tps40200dr.kicad_sym",+      "footprint": "tps40200dr.kicad_mod",+      "model_3d": "tps40200dr-etched.glb",+      "model_3d_plain": "tps40200dr.glb",+      "model_3d_step": "tps40200dr-etched.step",+      "model_3d_step_plain": "tps40200dr.step",+      "lbr": "tps40200dr.lbr"+    },+    "distributor_links": {+      "lcsc": "C37948"+    },+    "pins": [+      {+        "number": "1",+        "name": "RC",+        "type": "input",+        "description": "Switching frequency setting input via external RC network for operation between 35 kHz and 500 kHz, or external clock synchronization input with pulse amplitude greater than VIN/10 and minimum 150 mV trigger threshold."+      },+      {+        "number": "2",+        "name": "SS",+        "type": "input",+        "description": "Soft-start programming input; external capacitor to GND determines soft-start interval; voltage pulled below 150 mV disables switching and places device in shutdown state."+      },+      {+        "number": "3",+        "name": "COMP",+        "type": "output",+        "description": "Error amplifier output for control loop compensation network connection to FB pin."+      },+      {+        "number": "4",+        "name": "FB",+        "type": "input",+        "description": "Error amplifier inverting input; connect feedback resistor network center tap to establish regulated output voltage."+      },+      {+        "number": "5",+        "name": "GND",+        "type": "power_in",+        "description": "Device ground reference."+      },+      {+        "number": "6",+        "name": "GDRV",+        "type": "output",+        "description": "Gate driver output for external P-channel MOSFET; output voltage 6 V to 10 V with pull-up current 125-300 mA and pull-down current 200-300 mA."+      },+      {+        "number": "7",+        "name": "ISNS",+        "type": "input",+        "description": "Current-sense comparator input with 100 mV nominal threshold; connect current sense resistor between ISNS and VDD to set overcurrent protection level."+      },+      {+        "number": "8",+        "name": "VDD",+        "type": "power_in",+        "description": "System power supply input operating range 4.5 V to 52 V; local bypass capacitor to GND required for proper operation."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 52,+        "cost_usd": 0.3778,+        "at": "2026-09-24T01:59:09"+      },+      "datasheet": {+        "url": "https://www.ti.com/lit/ds/symlink/tps40200.pdf",+        "pages": 52,+        "sha256": "a3e23ec7367038ec",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file