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TPS40131RHBR
Public Made by Adomby adom
Texas Instruments DC-DC Controllers, VQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS40131RHBR
Texas Instruments · DC-DC Controllers · VQFN-32-EP(5x5)
TPS40131RHBR from Texas Instruments, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT1 | input | Bootstrap supply for the PWM1 high-side FET driver; connect a capacitor from this pin to SW1 and a Schottky diode from this pin to VIN5. |
| 2 | OVSET | input | A resistor divider from the output voltage to this pin sets the overvoltage sense point. |
| 3 | VOUT | input | Non-inverting input of the differential amplifier, to be connected to VOUT at the point of load. |
| 4 | GSNS | input | Inverting input of the differential amplifier, to be connected to ground at the point of load. |
| 5 | DIFFO | output | Output of the differential amplifier giving the true output voltage without PCB IR drops; VOUT and GSNS must be connected directly at the point of load. |
| 6 | CS1 | input | Senses the channel 1 inductor phase current through an external sense resistor or an R-C network using the inductor DCR, with traces connected directly at the sense element. |
| 7 | CSRT1 | output | Return point of the channel 1 current sense voltage; traces must connect directly at the current sense element. |
| 8 | COMP | output | Output of the error amplifier; its voltage sets the PWM duty cycle. |
| 9 | VREF | power_out | Output of the internal reference voltage; the load may be up to 100 µA DC. |
| 10 | +EA | input | Non-inverting input of the error amplifier, normally connected to VREF, which is the voltage the feedback loop regulates to. |
| 11 | FB | input | Inverting error amplifier input regulated to the internal 700 mV reference in closed loop; also used by the PGOOD and undervoltage comparators. |
| 12 | VDD | power_in | Power input for the LDO that powers the differential amplifier and the current sense amplifiers. |
| 13 | BP8 | power_out | LDO output powering the differential and current sense amplifiers, approximately (VVDD − 0.2 V) until it regulates at about 7.5 V; decouple with a minimum of 1.0 µF to GND. |
| 14 | EN/SYNC | input | A logic-high signal enables controller operation, and a pulsing signal synchronizes the rising edge of SW to the falling edge of an external clock. |
| 15 | ILIM | input | Sets the cycle-by-cycle current limit threshold; when reached, the PWM cycle is terminated and the converter delivers limited current. |
| 16 | PGOOD | output | Open-drain power good indicator connected to a voltage through an external resistor; high impedance when FB is between 0.616 V and 0.784 V (88% to 112% of VREF). |
| 17 | RT | input | A resistor from this pin to ground sets the oscillator frequency. |
| 18 | CSRT2 | output | Return point of the channel 2 current sense voltage; traces must connect directly at the current sense element. |
| 19 | CS2 | input | Senses the channel 2 inductor phase current through an external sense resistor or an R-C network using the inductor DCR, with traces connected directly at the sense element. |
| 20 | AGND | power_in | Low-noise ground connection to the device. |
| 21 | BP5 | power_out | Filtered output from VIN5 through a 10 Ω resistor; a 1.0 µF ceramic capacitor from this pin to ground is required. |
| 22 | UVLO | input | A voltage divider from VIN to this pin, set to 1 V, determines the input voltage that starts the controller. |
| 23 | SS | input | A capacitor on this pin sets the programmable soft-start; after an undervoltage or overcurrent fault the soft-start capacitor cycles 7 times with no switching before a normal soft-start. |
| 24 | BOOT2 | input | Bootstrap supply for the PWM2 high-side FET driver; connect a capacitor from this pin to SW2 and a Schottky diode from this pin to VIN5. |
| 25 | HDRV2 | output | Gate drive output for the PWM2 high-side N-channel MOSFET, referenced to SW2 and bootstrapped for enhancement. |
| 26 | SW2 | input | Connects to the switched node of converter 2 and serves as the power return for the channel 2 upper gate driver, with a high-current return path from the upper MOSFET source. |
| 27 | LDRV2 | output | Gate drive output for the PWM2 low-side synchronous rectifier N-channel MOSFET. |
| 28 | PGND | power_in | Power ground reference for the controller lower gate drivers, requiring a high-current return path from the lower MOSFET sources. |
| 29 | LDRV1 | output | Gate drive output for the PWM1 low-side synchronous rectifier N-channel MOSFET. |
| 30 | VIN5 | power_in | Power input for the device; a 1.0 µF ceramic capacitor should be connected from this pin to ground. |
| 31 | SW1 | input | Connects to the switched node of converter 1 and serves as the power return for the channel 1 upper gate driver, with a high-current return path from the upper MOSFET source. |
| 32 | HDRV1 | output | Gate drive output for the PWM1 high-side N-channel MOSFET, referenced to SW1 and bootstrapped for enhancement. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-32-EP(5x5) |
| Category | Power Supply Chip |
| Pins | 33 |
CAD (KiCad official)
- Symbol:
TPS40131RHBR - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
tps40131rhbr-etched.step/tps40131rhbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps40131rhbr.step/tps40131rhbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (42 pp, sha256
d6ec566965c86717, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).