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TPS40101RGER
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Texas Instruments DC-DC Converters, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+61@@ -0,0 +1,61 @@+# TPS40101RGER++**Texas Instruments** · DC-DC Converters · VQFN-24-EP(4x4)++TPS40101RGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | COMP | output | Error amplifier output that connects through a feedback network to FB for control-loop compensation. |+| 2 | FB | input | Inverting error amplifier input that sits at the internal reference of approximately 690 mV in normal operation. |+| 3 | TRKOUT | output | Tracking amplifier output that, when tracking is used, connects to FB through a resistor in series with a low-leakage diode. |+| 4 | TRKIN | input | Tracking control input; the output tracks TRKIN with a typical offset of 25 mV when the tracking amplifier is used. |+| 5 | UVLO | input | Programs the undervoltage lockout level and serves as the device shutdown input. |+| 6 | ILIM | output | Sets the overcurrent threshold through a resistor to GND; overcurrent is declared when this voltage reaches 1.48 V, and a parallel capacitor adds a nuisance-trip delay. |+| 7 | RT | input | A resistor from this pin to GND sets the operating frequency. |+| 8 | BIAS | power_out | Bypassed supply for internal circuitry; a 0.1-µF or greater ceramic capacitor should be connected from this pin to GND. |+| 9 | GND | power_in | Low-power signal ground; all signal-level circuits should be referenced to this pin unless otherwise noted. |+| 10 | SS | input | Soft-start programming pin; a capacitor to ground sets the soft-start time, and the pin also serves as a timeout during an overcurrent event. |+| 11 | GM | input | A resistor from this pin to GND sets the gain of the current sense amplifier. |+| 12 | PGND | power_in | Power ground for the internal gate drivers. |+| 13 | LDRV | output | Gate drive output for the N-channel synchronous rectifier MOSFET. |+| 14 | 5VBP | power_out | Output of the internal 5-V regulator, bypassed with 1 µF to PGND; total gate drive and external load current must not exceed the device thermal capability. |+| 15 | BST | input | Gate drive supply for the high-side N-channel MOSFET; an external Schottky diode from 5VBP (anode) to BST (cathode) and a capacitor from BST to SW are required. |+| 16 | HDRV | output | Floating gate drive output for the high-side N-channel MOSFET. |+| 17 | SW | input | Connected to the switched node of the converter; the return line for the flying high-side driver. |+| 18 | VDD | power_in | Supply voltage for the device; operation is specified from 4.5 V to 18 V, with an absolute maximum of -0.3 V to 20 V. |+| 19 | ISNS | input | Inductor DCR sensing input to the current sense amplifier used for overcurrent detection. |+| 20 | VO | input | Output voltage sense input and reference input to the current sense amplifier. |+| 21 | PG | output | Open-drain power-good output that is pulled low when FB is more than 10% above or below 690 mV, during UVLO, soft-start, tracking, overcurrent, or over-temperature. |+| 22 | SYNC | input | Rising-edge synchronization input for an external master clock; may be left floating or grounded if unused. |+| 23 | MGD | input | Margin-down pin; pulling to GND through less than 10 kΩ lowers the output by 5%, and a 30-kΩ resistor to GND gives a 3% margin. |+| 24 | MGU | input | Margin-up pin; pulling to GND through less than 10 kΩ raises the output by 5%, and a 30-kΩ resistor to GND gives a 3% margin. |+| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-24-EP(4x4) |+| Category | Power Management (PMIC) |+| Pins | 25 |++## CAD (KiCad official)++- Symbol: `TPS40101RGER`+- Footprint: `Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm`+- 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)+- 3D model files: `tps40101rger-etched.step` / `tps40101rger-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps40101rger.step` / `tps40101rger.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps40101) (40 pp, sha256 `7d2f9600d1852106`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps40101rger-datasheet.pdf)
page.jsonadded+303@@ -0,0 +1,303 @@+{+ "slug": "tps40101rger",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments DC-DC Converters, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tps40101rger",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps40101rger.kicad_sym",+ "tps40101rger.kicad_mod",+ "tps40101rger.glb",+ "tps40101rger.step",+ "tps40101rger.lbr",+ "docs/hero.png",+ "docs/tps40101rger-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tps40101rger-hero.glb",+ "tps40101rger-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPS40101RGER",+ "manufacturer": "Texas Instruments",+ "package": "VQFN-24-EP(4x4)",+ "pin_count": 25,+ "category": "Power Management (PMIC)",+ "subcategory": "DC-DC Converters",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps40101",+ "parts": {+ "symbol": "tps40101rger.kicad_sym",+ "footprint": "tps40101rger.kicad_mod",+ "model_3d": "tps40101rger-hero.glb",+ "model_3d_plain": "tps40101rger.glb",+ "model_3d_step": "tps40101rger-etched.step",+ "model_3d_step_plain": "tps40101rger.step",+ "lbr": "tps40101rger.lbr"+ },+ "distributor_links": {+ "lcsc": "C2865861",+ "digikey": "296-21271-2-ND",+ "mouser": "595-TPS40101RGER"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T16:39:35Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-21271-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TPS40101RGER",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "COMP",+ "type": "output",+ "description": "Error amplifier output that connects through a feedback network to FB for control-loop compensation."+ },+ {+ "number": "2",+ "name": "FB",+ "type": "input",+ "description": "Inverting error amplifier input that sits at the internal reference of approximately 690 mV in normal operation."+ },+ {+ "number": "3",+ "name": "TRKOUT",+ "type": "output",+ "description": "Tracking amplifier output that, when tracking is used, connects to FB through a resistor in series with a low-leakage diode."+ },+ {+ "number": "4",+ "name": "TRKIN",+ "type": "input",+ "description": "Tracking control input; the output tracks TRKIN with a typical offset of 25 mV when the tracking amplifier is used."+ },+ {+ "number": "5",+ "name": "UVLO",+ "type": "input",+ "description": "Programs the undervoltage lockout level and serves as the device shutdown input."+ },+ {+ "number": "6",+ "name": "ILIM",+ "type": "output",+ "description": "Sets the overcurrent threshold through a resistor to GND; overcurrent is declared when this voltage reaches 1.48 V, and a parallel capacitor adds a nuisance-trip delay."+ },+ {+ "number": "7",+ "name": "RT",+ "type": "input",+ "description": "A resistor from this pin to GND sets the operating frequency."+ },+ {+ "number": "8",+ "name": "BIAS",+ "type": "power_out",+ "description": "Bypassed supply for internal circuitry; a 0.1-µF or greater ceramic capacitor should be connected from this pin to GND."+ },+ {+ "number": "9",+ "name": "GND",+ "type": "power_in",+ "description": "Low-power signal ground; all signal-level circuits should be referenced to this pin unless otherwise noted."+ },+ {+ "number": "10",+ "name": "SS",+ "type": "input",+ "description": "Soft-start programming pin; a capacitor to ground sets the soft-start time, and the pin also serves as a timeout during an overcurrent event."+ },+ {+ "number": "11",+ "name": "GM",+ "type": "input",+ "description": "A resistor from this pin to GND sets the gain of the current sense amplifier."+ },+ {+ "number": "12",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground for the internal gate drivers."+ },+ {+ "number": "13",+ "name": "LDRV",+ "type": "output",+ "description": "Gate drive output for the N-channel synchronous rectifier MOSFET."+ },+ {+ "number": "14",+ "name": "5VBP",+ "type": "power_out",+ "description": "Output of the internal 5-V regulator, bypassed with 1 µF to PGND; total gate drive and external load current must not exceed the device thermal capability."+ },+ {+ "number": "15",+ "name": "BST",+ "type": "input",+ "description": "Gate drive supply for the high-side N-channel MOSFET; an external Schottky diode from 5VBP (anode) to BST (cathode) and a capacitor from BST to SW are required."+ },+ {+ "number": "16",+ "name": "HDRV",+ "type": "output",+ "description": "Floating gate drive output for the high-side N-channel MOSFET."+ },+ {+ "number": "17",+ "name": "SW",+ "type": "input",+ "description": "Connected to the switched node of the converter; the return line for the flying high-side driver."+ },+ {+ "number": "18",+ "name": "VDD",+ "type": "power_in",+ "description": "Supply voltage for the device; operation is specified from 4.5 V to 18 V, with an absolute maximum of -0.3 V to 20 V."+ },+ {+ "number": "19",+ "name": "ISNS",+ "type": "input",+ "description": "Inductor DCR sensing input to the current sense amplifier used for overcurrent detection."+ },+ {+ "number": "20",+ "name": "VO",+ "type": "input",+ "description": "Output voltage sense input and reference input to the current sense amplifier."+ },+ {+ "number": "21",+ "name": "PG",+ "type": "output",+ "description": "Open-drain power-good output that is pulled low when FB is more than 10% above or below 690 mV, during UVLO, soft-start, tracking, overcurrent, or over-temperature."+ },+ {+ "number": "22",+ "name": "SYNC",+ "type": "input",+ "description": "Rising-edge synchronization input for an external master clock; may be left floating or grounded if unused."+ },+ {+ "number": "23",+ "name": "MGD",+ "type": "input",+ "description": "Margin-down pin; pulling to GND through less than 10 kΩ lowers the output by 5%, and a 30-kΩ resistor to GND gives a 3% margin."+ },+ {+ "number": "24",+ "name": "MGU",+ "type": "input",+ "description": "Margin-up pin; pulling to GND through less than 10 kΩ raises the output by 5%, and a 30-kΩ resistor to GND gives a 3% margin."+ },+ {+ "number": "25",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The exposed thermal pad (EP) implied by the package hint VQFN-24-EP is not listed as a numbered pin ; Pin types follow the datasheet table (I/O/-) mapped to KiCad classes. 5VBP and BIAS are regulated su; The table lists ILIM as output, but it is a resistor-to-GND current-limit node; typed output per the",+ "exposed pad 25 added from the footprint"+ ],+ "pages_sent": 11,+ "cost_usd": 0.0758,+ "at": "2026-10-08T16:39:19"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps40101",+ "pages": 40,+ "sha256": "7d2f9600d1852106",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 25,+ "described": 25,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tps40101rger.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4,+ 4,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "f7d256794c4147daf24dcae0554fae18510315e565ad1e239b475be7fef80d8b",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tps40101rger-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4,+ 4,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "9312db798c7fc7cc54e674ce27e3c8252060df28cc15ee8b6e7946f1af970106",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}