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TPS3899DL10DSER
Public Made by Adomby adom
Texas Instruments Supervisor And Reset ICs, WSON-6(1.5x1.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS3899DL10DSER
Texas Instruments · Supervisor And Reset ICs · WSON-6(1.5x1.5)
TPS3899DL10DSER from Texas Instruments, in a WSON-6(1.5x1.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CTR | passive | Capacitor-programmable reset delay: a ground-referenced capacitor (0 to 10 µF recommended range) connected here sets the RESET/RESET delay before deassertion when returning from reset. |
| 2 | CTS | passive | Capacitor-programmable sense delay: a ground-referenced capacitor (0 to 10 µF recommended range) connected here sets the delay before RESET asserts after the monitored voltage falls below VIT-. |
| 3 | GND | power_in | Ground reference for the device. |
| 4 | VDD | power_in | Supply voltage pin, rated 0.85 V to 6 V for the DL and PL outputs; good analog practice is to place a 0.1 µF ceramic capacitor close to this pin. |
| 5 | SENSE | input | Monitored voltage input (direct for fixed-threshold variants or via a resistor divider for the adjustable variant), with a 0 to 6 V recommended range; for noisy applications a 10 nF to 100 nF ceramic capacitor placed close to the pin may be needed. |
| 6 | RESET | output | Active-low reset output for the DL variant (open-drain): it asserts low after the CTS delay when SENSE falls below VIT- and stays asserted until SENSE rises above VIT- + VHYS and the CTR delay expires; recommended RESET current is 0 to ±5 mA, with ±20 mA absolute maximum and RESET (TPS3899DL) rated 0 to 6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-6(1.5x1.5) |
| Category | Power Management (PMIC) |
| Pins | 6 |
CAD (KiCad official)
- Symbol:
TPS3899DL10DSER - Footprint:
Package_SON:WSON-6_1.5x1.5mm_P0.5mm - 3D model: WSON-6(1.5x1.5) (KiCad packages3D, STEP)
- 3D model files:
tps3899dl10dser-etched.step/tps3899dl10dser-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps3899dl10dser.step/tps3899dl10dser.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (36 pp, sha256
d206381355830c12, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS3899DL10DSER
**Texas Instruments** · Supervisor And Reset ICs · WSON-6(1.5x1.5)
TPS3899DL10DSER from Texas Instruments, in a WSON-6(1.5x1.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CTR | passive | Capacitor-programmable reset delay: a ground-referenced capacitor (0 to 10 µF recommended range) connected here sets the RESET/RESET delay before deassertion when returning from reset. |
| 2 | CTS | passive | Capacitor-programmable sense delay: a ground-referenced capacitor (0 to 10 µF recommended range) connected here sets the delay before RESET asserts after the monitored voltage falls below VIT-. |
| 3 | GND | power_in | Ground reference for the device. |
| 4 | VDD | power_in | Supply voltage pin, rated 0.85 V to 6 V for the DL and PL outputs; good analog practice is to place a 0.1 µF ceramic capacitor close to this pin. |
| 5 | SENSE | input | Monitored voltage input (direct for fixed-threshold variants or via a resistor divider for the adjustable variant), with a 0 to 6 V recommended range; for noisy applications a 10 nF to 100 nF ceramic capacitor placed close to the pin may be needed. |
| 6 | RESET | output | Active-low reset output for the DL variant (open-drain): it asserts low after the CTS delay when SENSE falls below VIT- and stays asserted until SENSE rises above VIT- + VHYS and the CTR delay expires; recommended RESET current is 0 to ±5 mA, with ±20 mA absolute maximum and RESET (TPS3899DL) rated 0 to 6 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-6(1.5x1.5) |
| Category | Power Management (PMIC) |
| Pins | 6 |
## CAD (KiCad official)
- Symbol: `TPS3899DL10DSER`
- Footprint: `Package_SON:WSON-6_1.5x1.5mm_P0.5mm`
- 3D model: WSON-6(1.5x1.5) (KiCad packages3D, STEP)
- 3D model files: `tps3899dl10dser-etched.step` / `tps3899dl10dser-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps3899dl10dser.step` / `tps3899dl10dser.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps3899) (36 pp, sha256 `d206381355830c12`, retrieved 2026-10-08, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps3899dl10dser-datasheet.pdf)