main
Download ZIP Propose a change
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 2d ago
viewers tps389030dser: viewers · Ray 2d ago
package.json tps389030dser: LCSC part number C2066942 (was published as the bare integer) · Ray 2d ago
page.json tps389030dser: LCSC part number C2066942 (was published as the bare integer) · Ray 2d ago
README.md Initial commit: component/tps389030dser · Ray 2d ago
tps389030dser-etched.glb tps389030dser: factory component page (tier=lcsc) · Ray 2d ago
tps389030dser-etched.step tps389030dser: factory component page (tier=lcsc) · Ray 2d ago
tps389030dser-hero.glb Publish 0.1.0 · Ray 2d ago
tps389030dser-hero.overlay.json Publish 0.1.0 · Ray 2d ago
tps389030dser.glb Publish 0.1.0 · Ray 2d ago
tps389030dser.kicad_mod Publish 0.1.0 · Ray 2d ago
tps389030dser.kicad_sym Publish 0.1.0 · Ray 2d ago
tps389030dser.lbr Publish 0.1.0 · Ray 2d ago
tps389030dser.step Publish 0.1.0 · Ray 2d ago

TPS389030DSER

Texas Instruments · Supervisor And Reset ICs · WSON-6(1.5x1.5)

TPS389030DSER from Texas Instruments, in a WSON-6(1.5x1.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SENSE input Voltage monitoring input; RESET asserts when SENSE falls below negative threshold VITN and deasserts when SENSE rises above positive threshold VITP.
2 GND power_in Ground reference.
3 MR input Manual reset input; driving this pin low causes RESET to assert (go low).
4 VDD power_in Supply voltage input rated 1.5 V to 5.5 V; place 0.1 µF ceramic capacitor close to this pin per good analog design practice.
5 CT passive Capacitor timing pin for user-adjustable RESET delay; connect to ground-referenced capacitor with delay time calculated as tPD(r) (sec) = CCT (µF) × 1.07 + 25 µs nominal.
6 RESET tri_state Open-drain reset output; driven low when MR is low or SENSE voltage is below VITN, remains low for programmable delay period after MR rises to high and SENSE exceeds VITP, requires 10 kΩ to 1 MΩ pullup resistor.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-6(1.5x1.5)
Category Power Management (PMIC)
Pins 6

CAD (KiCad official)

  • Symbol: TPS389030DSER
  • Footprint: Package_SON:WSON-6_1.5x1.5mm_P0.5mm
  • 3D model: WSON-6(1.5x1.5) (KiCad packages3D, STEP)
  • 3D model files: tps389030dser-etched.step / tps389030dser-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps389030dser.step / tps389030dser.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (27 pp, sha256 2e4edd01aa5645e5, retrieved 2026-10-06, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF