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TPS389025QDSERQ1
Public Made by Adomby adom
Texas Instruments Supervisor And Reset ICs, WSON-6(1.5x1.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS389025QDSERQ1
Texas Instruments · Supervisor And Reset ICs · WSON-6(1.5x1.5)
TPS389025QDSERQ1 from Texas Instruments, in a WSON-6(1.5x1.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SENSE | input | This pin is connected to the voltage to be monitored; RESET goes low when SENSE falls below the negative threshold VITN and goes high when it rises above the positive threshold VITP. |
| 2 | GND | power_in | Ground reference pin. |
| 3 | MR | input | Driving the manual reset pin MR low causes RESET to go low (assert). |
| 4 | VDD | power_in | Supply voltage pin with a recommended range of 1.5 V to 5.5 V; good analog practice is to place a 0.1-µF ceramic capacitor close to this pin. |
| 5 | CT | passive | User-adjustable delay pin; connecting a ground-referenced capacitor sets the RESET delay time to deassert, with tPD(r) (sec) = CCT (µF) × 1.07 + 25 µs (nom). |
| 6 | RESET | output | Open-drain output driven low when MR is low or SENSE is below VITN, requiring a pullup resistor from 10 kΩ to 1 MΩ. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-6(1.5x1.5) |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input supply voltage | VDD | 1.5 | 5.5 | V | 4 | ||
| SENSE input threshold voltage accuracy | VITN, VITP | -1 | 0.5 | 1 | % | over operating junction temperature range | 5 |
| Hysteresis | VHYST | 0.325 | 0.575 | 0.825 | % | 5 | |
| Supply current into VDD pin | IDD | 2.09 | 3.72 | µA | VDD = 3.3 V, IRESET = 0 mA, -40°C < TJ < 85°C | 5 | |
| Supply current into VDD pin | IDD | 4.5 | µA | VDD = 3.3 V, IRESET = 0 mA, -40°C < TJ < 105°C | 5 | ||
| Supply current into VDD pin | IDD | 5.8 | µA | VDD = 3.3 V, IRESET = 0 mA | 5 | ||
| Supply current into VDD pin | IDD | 2.29 | 4 | µA | VDD = 5.5 V, IRESET = 0 mA, -40°C < TJ < 85°C | 5 | |
| Supply current into VDD pin | IDD | 5.2 | µA | VDD = 5.5 V, IRESET = 0 mA, -40°C < TJ < 105°C | 5 | ||
| Supply current into VDD pin | IDD | 6.5 | µA | VDD = 5.5 V, IRESET = 0 mA | 5 | ||
| CT pin charge current | ICT | 0.9 | 1.15 | 1.35 | µA | 5 | |
| CT pin comparator threshold voltage | VCT | 1.17 | 1.23 | 1.29 | V | 5 | |
| Low-level output voltage | VOL | 0.25 | V | VDD ≥ 1.5 V, IRESET = 0.4 mA | 5 | ||
| Low-level output voltage | VOL | 0.3 | V | VDD ≥ 4.5 V, IRESET = 3 mA | 5 | ||
| Open-drain output leakage | ILKG(OD) | 250 | nA | High impedance, VSENSE = VRESET = 5.5 V | 5 | ||
| Absolute max VDD voltage | VDD | -0.3 | 7 | V | 4 | ||
| Absolute max SENSE voltage | SENSE | -0.3 | 7 | V | 4 | ||
| Absolute max RESET voltage | RESET | -0.3 | 7 | V | 4 | ||
| Absolute max MR voltage | MR | -0.3 | 7 | V | 4 | ||
| Absolute max CT voltage | VCT | -0.3 | 7 | V | 4 | ||
| Absolute max RESET current | RESET | -20 | 20 | mA | 4 | ||
| Operating junction temperature | TJ | -40 | 125 | °C | 4 | ||
| Operating ambient temperature | TA | -40 | 125 | °C | 4 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Power-supply voltage | VDD | 1.5 | 5.5 | V | 4 | ||
| SENSE voltage | VSENSE | 0 | 5.5 | V | 4 | ||
| RESET pin voltage | VRESET | 0 | 5.5 | V | 4 | ||
| RESET pin current | IRESET | -5 | 5 | mA | 4 | ||
| Input capacitor, VDD pin | CIN | 0 | 0.1 | µF | 4 | ||
| Reset timeout capacitor, CT pin | CCT | 0 | 26 | µF | 4 | ||
| Pullup resistor, RESET pin | RPU | 1 | 1000 | kΩ | 4 | ||
| Junction temperature (free-air) | TJ | -40 | 25 | 125 | °C | 4 | |
| Negative threshold voltage | VITN | 2.4 | V | TPS389025-Q1 per device comparison table | 3 | ||
| Positive threshold voltage | VITP | 2.414 | V | TPS389025-Q1 per device comparison table | 3 | ||
| SENSE falling to RESET propagation delay | tPD(f) | 18 | µs | CT = open, VDD = 3.3 V | 5 | ||
| SENSE falling to RESET propagation delay | tPD(f) | 8 | µs | CT = open, VDD = 5.5 V | 5 | ||
| SENSE rising to RESET propagation delay | tPD(r) | 25 | µs | CT = open, VDD = 3.3 V | 5 | ||
| SENSE pin glitch immunity | tGI(SENSE) | 9 | µs | VDD = 5.5 V | 5 | ||
| MR pin glitch immunity | tGI(MR) | 100 | ns | VDD = 5.5 V | 5 | ||
| MR pin pulse duration to assert RESET | tMRW | 1 | µs | 5 | |||
| MR pin low to out delay | td(MR) | 250 | ns | 5 | |||
| Startup delay | tSTRT | 325 | µs | 5 | |||
| Junction-to-ambient thermal resistance | RθJA | 321.3 | °C/W | DSE (WSON) 6 pins | 4 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 207.9 | °C/W | DSE (WSON) 6 pins | 4 | ||
| Junction-to-board thermal resistance | RθJB | 281.5 | °C/W | DSE (WSON) 6 pins | 4 | ||
| Junction-to-top characterization parameter | ψJT | 42.4 | °C/W | DSE (WSON) 6 pins | 4 | ||
| Junction-to-board characterization parameter | ψJB | 284.8 | °C/W | DSE (WSON) 6 pins | 4 | ||
| Junction-to-case (bottom) thermal resistance | RθJC(bot) | 142.3 | °C/W | DSE (WSON) 6 pins | 4 |
CAD (KiCad official)
- Symbol:
TPS389025QDSERQ1 - Footprint:
Package_SON:WSON-6_1.5x1.5mm_P0.5mm - 3D model: WSON-6(1.5x1.5) (KiCad packages3D, STEP)
- 3D model files:
tps389025qdserq1-etched.step/tps389025qdserq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps389025qdserq1.step/tps389025qdserq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (27 pp, sha256
df60d175a821bd24, retrieved 2026-11-06, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS389025QDSERQ1
**Texas Instruments** · Supervisor And Reset ICs · WSON-6(1.5x1.5)
TPS389025QDSERQ1 from Texas Instruments, in a WSON-6(1.5x1.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SENSE | input | This pin is connected to the voltage to be monitored; RESET goes low when SENSE falls below the negative threshold VITN and goes high when it rises above the positive threshold VITP. |
| 2 | GND | power_in | Ground reference pin. |
| 3 | MR | input | Driving the manual reset pin MR low causes RESET to go low (assert). |
| 4 | VDD | power_in | Supply voltage pin with a recommended range of 1.5 V to 5.5 V; good analog practice is to place a 0.1-µF ceramic capacitor close to this pin. |
| 5 | CT | passive | User-adjustable delay pin; connecting a ground-referenced capacitor sets the RESET delay time to deassert, with tPD(r) (sec) = CCT (µF) × 1.07 + 25 µs (nom). |
| 6 | RESET | output | Open-drain output driven low when MR is low or SENSE is below VITN, requiring a pullup resistor from 10 kΩ to 1 MΩ. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-6(1.5x1.5) |
| Category | Power Management (PMIC) |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input supply voltage | VDD | 1.5 | | 5.5 | V | | 4 |
| SENSE input threshold voltage accuracy | VITN, VITP | -1 | 0.5 | 1 | % | over operating junction temperature range | 5 |
| Hysteresis | VHYST | 0.325 | 0.575 | 0.825 | % | | 5 |
| Supply current into VDD pin | IDD | | 2.09 | 3.72 | µA | VDD = 3.3 V, IRESET = 0 mA, -40°C < TJ < 85°C | 5 |
| Supply current into VDD pin | IDD | | | 4.5 | µA | VDD = 3.3 V, IRESET = 0 mA, -40°C < TJ < 105°C | 5 |
| Supply current into VDD pin | IDD | | | 5.8 | µA | VDD = 3.3 V, IRESET = 0 mA | 5 |
| Supply current into VDD pin | IDD | | 2.29 | 4 | µA | VDD = 5.5 V, IRESET = 0 mA, -40°C < TJ < 85°C | 5 |
| Supply current into VDD pin | IDD | | | 5.2 | µA | VDD = 5.5 V, IRESET = 0 mA, -40°C < TJ < 105°C | 5 |
| Supply current into VDD pin | IDD | | | 6.5 | µA | VDD = 5.5 V, IRESET = 0 mA | 5 |
| CT pin charge current | ICT | 0.9 | 1.15 | 1.35 | µA | | 5 |
| CT pin comparator threshold voltage | VCT | 1.17 | 1.23 | 1.29 | V | | 5 |
| Low-level output voltage | VOL | | | 0.25 | V | VDD ≥ 1.5 V, IRESET = 0.4 mA | 5 |
| Low-level output voltage | VOL | | | 0.3 | V | VDD ≥ 4.5 V, IRESET = 3 mA | 5 |
| Open-drain output leakage | ILKG(OD) | | | 250 | nA | High impedance, VSENSE = VRESET = 5.5 V | 5 |
| Absolute max VDD voltage | VDD | -0.3 | | 7 | V | | 4 |
| Absolute max SENSE voltage | SENSE | -0.3 | | 7 | V | | 4 |
| Absolute max RESET voltage | RESET | -0.3 | | 7 | V | | 4 |
| Absolute max MR voltage | MR | -0.3 | | 7 | V | | 4 |
| Absolute max CT voltage | VCT | -0.3 | | 7 | V | | 4 |
| Absolute max RESET current | RESET | -20 | | 20 | mA | | 4 |
| Operating junction temperature | TJ | -40 | | 125 | °C | | 4 |
| Operating ambient temperature | TA | -40 | | 125 | °C | | 4 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 4 |
| Power-supply voltage | VDD | 1.5 | | 5.5 | V | | 4 |
| SENSE voltage | VSENSE | 0 | | 5.5 | V | | 4 |
| RESET pin voltage | VRESET | 0 | | 5.5 | V | | 4 |
| RESET pin current | IRESET | -5 | | 5 | mA | | 4 |
| Input capacitor, VDD pin | CIN | 0 | 0.1 | | µF | | 4 |
| Reset timeout capacitor, CT pin | CCT | 0 | | 26 | µF | | 4 |
| Pullup resistor, RESET pin | RPU | 1 | | 1000 | kΩ | | 4 |
| Junction temperature (free-air) | TJ | -40 | 25 | 125 | °C | | 4 |
| Negative threshold voltage | VITN | | 2.4 | | V | TPS389025-Q1 per device comparison table | 3 |
| Positive threshold voltage | VITP | | 2.414 | | V | TPS389025-Q1 per device comparison table | 3 |
| SENSE falling to RESET propagation delay | tPD(f) | | 18 | | µs | CT = open, VDD = 3.3 V | 5 |
| SENSE falling to RESET propagation delay | tPD(f) | | 8 | | µs | CT = open, VDD = 5.5 V | 5 |
| SENSE rising to RESET propagation delay | tPD(r) | | 25 | | µs | CT = open, VDD = 3.3 V | 5 |
| SENSE pin glitch immunity | tGI(SENSE) | | 9 | | µs | VDD = 5.5 V | 5 |
| MR pin glitch immunity | tGI(MR) | | 100 | | ns | VDD = 5.5 V | 5 |
| MR pin pulse duration to assert RESET | tMRW | | 1 | | µs | | 5 |
| MR pin low to out delay | td(MR) | | 250 | | ns | | 5 |
| Startup delay | tSTRT | | 325 | | µs | | 5 |
| Junction-to-ambient thermal resistance | RθJA | | 321.3 | | °C/W | DSE (WSON) 6 pins | 4 |
| Junction-to-case (top) thermal resistance | RθJC(top) | | 207.9 | | °C/W | DSE (WSON) 6 pins | 4 |
| Junction-to-board thermal resistance | RθJB | | 281.5 | | °C/W | DSE (WSON) 6 pins | 4 |
| Junction-to-top characterization parameter | ψJT | | 42.4 | | °C/W | DSE (WSON) 6 pins | 4 |
| Junction-to-board characterization parameter | ψJB | | 284.8 | | °C/W | DSE (WSON) 6 pins | 4 |
| Junction-to-case (bottom) thermal resistance | RθJC(bot) | | 142.3 | | °C/W | DSE (WSON) 6 pins | 4 |
## CAD (KiCad official)
- Symbol: `TPS389025QDSERQ1`
- Footprint: `Package_SON:WSON-6_1.5x1.5mm_P0.5mm`
- 3D model: WSON-6(1.5x1.5) (KiCad packages3D, STEP)
- 3D model files: `tps389025qdserq1-etched.step` / `tps389025qdserq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps389025qdserq1.step` / `tps389025qdserq1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps3890-q1) (27 pp, sha256 `df60d175a821bd24`, retrieved 2026-11-06, tier: manufacturer)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps389025qdserq1-datasheet.pdf)