component
TPS389001DSER
Public Made by Adomby adom
Texas Instruments TPS389001DSER adjustable voltage supervisor with programmable reset delay, manual reset and open-drain output in WSON-6.
← Commit history
Show the shared chip-thumbnailer cache widget and reusable artwork manifest
2 files changed
+24−7
README.md+15−6@@ -15,7 +15,7 @@ Texas Instruments adjustable 1.15 V supervisor in DSE0006A WSON-6. This page pre | 1 | SENSE | Threshold input | | 2 | GND | Power return | | 3 | MR, active low | Manual-reset input |-| 4 | VDD | Supply input, recommended 1.5â5.5 V |+| 4 | VDD | Supply input, recommended 1.5âÂÂ5.5 V | | 5 | CT | Timing-capacitor terminal; modeled passive | | 6 | RESET, active low | Open-drain output; modeled open collector | @@ -23,15 +23,15 @@ The adom-symbol source groups Monitor, Control, Reset and Supply. Connection end ## Footprint and export status -`TPS389001DSER.kicad_mod` transcribes the manufacturer's example board/stencil drawings, PDF pages 25â26. The solderable/paste rectangles are 0.8 à 0.25 mm for pad 1 and 0.7 à 0.25 mm for the other pads. Pad 1 extends farther inward and shares the row's outer edge. Pads 1â3 use solder-mask-defined lands with 0.05 mm copper overlap; pads 4â6 use non-solder-mask-defined lands with 0.05 mm mask expansion. `land-pattern-intent.json` records exact copper, mask and paste dimensions. The package has six terminals and no separate exposed pad. Silk includes an external pad-1 cue; the fab outline includes a corner cue.+`TPS389001DSER.kicad_mod` transcribes the manufacturer's example board/stencil drawings, PDF pages 25âÂÂ26. The solderable/paste rectangles are 0.8 à0.25 mm for pad 1 and 0.7 à0.25 mm for the other pads. Pad 1 extends farther inward and shares the row's outer edge. Pads 1âÂÂ3 use solder-mask-defined lands with 0.05 mm copper overlap; pads 4âÂÂ6 use non-solder-mask-defined lands with 0.05 mm mask expansion. `land-pattern-intent.json` records exact copper, mask and paste dimensions. The package has six terminals and no separate exposed pad. Silk includes an external pad-1 cue; the fab outline includes a corner cue. **The canonical conversion remains a design candidate.** Installed adom-lbr 2.39.0 drops all per-pad mask and paste margins. Isolated development commit `19e46a6` preserves those fields, footprint defaults and explicit layer participation through KiCad, and adds signed Altium expansion fields with codec tests. The current supervisor Altium export refuses its unrepresentable rounded-corner value; Fusion explicit aperture export returns an unsupported-feature error. Native desktop parity is still unproven. See [adom-lbr issue 25](https://wiki.adom.inc/adom/adom-lbr/issues/25) and `aperture-roundtrip-audit.json`. The original roundtrip-diagnostic copies lost the attributes and must not be used for fabrication. The newer `aperture-candidate/` files preserve them; all remain unqualified. A footprint preview's copper shape alone cannot prove aperture fidelity. InstaPCB mask registration, paste-jet suitability and independent land-pattern review remain open. -The STEP's thin axis is Y: OCCT bounds X ±0.75 mm, Y â0.025..0.775 mm, Z ±0.75 mm. PCB rotation, standoff and pin-1 registration are unverified, so the footprint intentionally has no model reference yet. This is a package-model view, not a seated-board preview. Native KiCad/Fusion/Altium parity remains pending.+The STEP's thin axis is Y: OCCT bounds X ñ0.75 mm, Y âÂÂ0.025..0.775 mm, Z ñ0.75 mm. PCB rotation, standoff and pin-1 registration are unverified, so the footprint intentionally has no model reference yet. This is a package-model view, not a seated-board preview. Native KiCad/Fusion/Altium parity remains pending. ## Circuit and sourcing notes -VDD requires local 0.1 µF decoupling. MR logic thresholds track VDD; a 3.3 V host must not directly assert an assumed valid high when this device is powered from 5 V. RESET needs a pull-up. Select the timing capacitor using the manufacturer datasheet equation and its units, then budget timing and startup limits for the application.+VDD requires local 0.1 õF decoupling. MR logic thresholds track VDD; a 3.3 V host must not directly assert an assumed valid high when this device is powered from 5 V. RESET needs a pull-up. Select the timing capacitor using the manufacturer datasheet equation and its units, then budget timing and startup limits for the application. Parts Search snapshot, 9 September 2026: exact Mouser `595-TPS389001DSER` reports 2190 units at $1.92 each, with a 112-day lead-time field. Packaging/fulfillment are unconfirmed, and no order or reservation was made. The banner instead recommended DSET; [Parts Search issue 8](https://wiki.adom.inc/adom/adom-parts-search/issues/8) records that mismatch. DSER is the exact orderable documented on this page. Distributor snapshots are dated evidence, not current availability or a stock reservation; query inventory for the intended build. @@ -43,7 +43,7 @@ Parts Search snapshot, 9 September 2026: exact Mouser `595-TPS389001DSER` report ## Independent-opening candidate -The newer `explicit-aperture-candidate/` retains six named copper terminals and carries twelve unnumbered technical-layer pads for independent mask and paste openings. This prevents KiCad from scaling the opening corner radius with the copper-pad ratio. [Inspect the newer native geometry](https://wiki.adom.inc/adom/tps389001dser/render/explicit-aperture-candidate/aperture-inspection.html). All twelve native opening sizes and R0.05 mm radii match the saved intent within the SVG's coordinate precision. The six electrical connections remain 1â1 through 6â6. Earlier files and the failing corner example are preserved separately.+The newer `explicit-aperture-candidate/` retains six named copper terminals and carries twelve unnumbered technical-layer pads for independent mask and paste openings. This prevents KiCad from scaling the opening corner radius with the copper-pad ratio. [Inspect the newer native geometry](https://wiki.adom.inc/adom/tps389001dser/render/explicit-aperture-candidate/aperture-inspection.html). All twelve native opening sizes and R0.05 mm radii match the saved intent within the SVG's coordinate precision. The six electrical connections remain 1âÂÂ1 through 6âÂÂ6. Earlier files and the failing corner example are preserved separately. The dedicated 5 mm coupon's native DRC reports two copper clearance findings (0.15 mm actual vs default 0.20 mm) and a reference-text edge clipping warning. The detailed native report is authoritative; the service CLI incorrectly summarized zero findings. The InstaPCB skill specifies 0.10 mm minimum spacing, but this coupon did not carry a complete InstaPCB project rule set. This is therefore geometry evidence, not a passing manufacturing DRC. Default ignored checks, including footprint-type mismatch, remain recorded in the native report. Independent copper-land review, native target adapters, model seating and full board qualification remain open. @@ -68,6 +68,15 @@ The top-surface TPS389001DSER marking was generated by `adom-chip-laser` in the ## MPN marking, source and license -**Mark location:** Clear top face of the supervisor housing; existing reviewed MPN inlay retained. The exact MPN is a virtual identification inlay generated by `adom-chip-laser`, not a claim about the manufacturer’s actual package marking. The physical source model and reference-artwork geometry remain unchanged.+**Mark location:** Clear top face of the supervisor housing; existing reviewed MPN inlay retained. The exact MPN is a virtual identification inlay generated by `adom-chip-laser`, not a claim about the manufacturerâs actual package marking. The physical source model and reference-artwork geometry remain unchanged. The Source field links to the manufacturer/reference authority. Generation tools such as adom-lbr, adom-symbol, step2glb and Adom Chip Laser are recorded separately in artifact provenance. Original Adom-authored content defaults to the MIT open-source license; manufacturer and upstream assets retain their original terms and attribution. See [license scope](LICENSE-Adom.md). Native CAD parity and manufacturing qualification are separate checks.+++## Cached chip artwork++These reusable chip previews and symbol outlines retain the reviewed Z-up pose and virtual MPN placement. Read the manifest before generating new artwork; compare its source hashes before reuse. Electrical and native model-seating qualification remain separate.++::adom-chip-thumbnail{src="/adom/tps389001dser/render/artwork/TPS389001DSER-thumbs.json"}++[Cache manifest and generation recipe](artwork/TPS389001DSER-thumbs.json) · [Original manufacturer STEP](DSE0006A.stp)
page.json+9−1@@ -35,5 +35,13 @@ "headline": "TPS389001DSER", "subhead": "Adjustable reset supervisor; manufacturer assets and source library" },- "license": "MIT"+ "license": "MIT",+ "metadata": {+ "chip_thumbnail_cache": {+ "manifest": "artwork/TPS389001DSER-thumbs.json",+ "schema": "adom/chip-artwork-cache@1",+ "widget": "adom-chip-thumbnail",+ "reuse": "Verify source hashes and reuse the reviewed Z-up pose and surface-selected MPN placement."+ }+ } }