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TPS3870J4330DSERQ1

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Texas Instruments Supervisor And Reset ICs, WSON-6(1.5x1.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tps3870j4330dserq1factory-2.0.0extractor-text

Verified TPS3870J4330DSERQ1

by Ray · last 6 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

6 Nov 2026RayPublished by the parts factory: tier mfr, 6 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: TPS3870J4330DSERQ1 · WSON-6(1.5x1.5) · 6 pins
  • ✓copper: 6 copper pads, none touching another net
  • ✓datasheet: all 6 pin names found in the 29-page datasheet
  • ✓distributor: lcsc C1849513, digikey 296-TPS3870J4330DSERQ1TR-ND, mouser 595-S3870J4330DSERQ1
  • ✓family: WSON-6_1.5x1.5mm_P0.5mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-zovx0udq/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 6 pins = 6 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 6 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ tps3870j4330dserq1.kicad_sym✓ tps3870j4330dserq1.kicad_mod✓ tps3870j4330dserq1.step
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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 2h ago
viewers tps3870j4330dserq1: viewers · Ray 2h ago
package.json Publish 0.1.0 · Ray 2h ago
page.json Set visibility: public · Ray 2h ago
README.md Publish 0.1.0 · Ray 2h ago
tps3870j4330dserq1-etched.glb Publish 0.1.0 · Ray 2h ago
tps3870j4330dserq1-etched.step tps3870j4330dserq1: factory component page (tier=mfr) · Ray 2h ago
tps3870j4330dserq1-hero.glb tps3870j4330dserq1: hero GLB from the etched model (keeps the MPN mark) · Ray 2h ago
tps3870j4330dserq1-hero.overlay.json Publish 0.1.0 · Ray 2h ago
tps3870j4330dserq1.glb Publish 0.1.0 · Ray 2h ago
tps3870j4330dserq1.kicad_mod Publish 0.1.0 · Ray 2h ago
tps3870j4330dserq1.kicad_sym Publish 0.1.0 · Ray 2h ago
tps3870j4330dserq1.lbr Publish 0.1.0 · Ray 2h ago
tps3870j4330dserq1.step Publish 0.1.0 · Ray 2h ago
verification.json Verified: Published by the parts factory: tier mfr, 6 pins · Ray 2h ago

TPS3870J4330DSERQ1

Texas Instruments · Supervisor And Reset ICs · WSON-6(1.5x1.5)

TPS3870J4330DSERQ1 from Texas Instruments, in a WSON-6(1.5x1.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SENSE input Input for the monitored supply voltage rail, with RESET driven low when SENSE rises above the overvoltage threshold VIT+(OV), and connected to VDD when monitoring the VDD supply.
2 VDD power_in Supply voltage input operating from 1.7 V to 5.5 V with a 6 V absolute maximum rating, and a 0.1 µF ceramic capacitor placed close to the pin is recommended.
3 CT input Capacitor time delay pin that selects one of two fixed reset delays by connecting to VDD (10 kΩ pull-up recommended) or leaving it floating, and accepts an external capacitor to ground to program the delay.
4 RESET output Active-low open-drain output that goes low when SENSE rises above VIT+(OV) and requires a pull-up resistor, with output current limited to 10 mA maximum.
5 GND power_in Ground reference pin for the device.
6 MR input Manual reset input that asserts RESET when pulled to a logic low (VMR_L), and can be left floating because it is internally pulled up to VDD.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-6(1.5x1.5)
Category Power Management (PMIC)
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VDD VDD 1.7 5.5 V 6
Positive-going threshold accuracy VIT+(OV) -0.7 0.25 0.7 % 6
Hysteresis voltage VHYS 0.3 0.55 0.8 % Hysteresis with respect to trip point VIT+(OV) 6
Supply current IDD 4.5 7 µA VDD ≤ 5.5 V 6
Low level output voltage VDD = 1.7 V VOL 250 mV VDD = 1.7 V, IOUT = 0.4 mA 6
Low level output voltage VDD = 2 V VOL 250 mV VDD = 2 V, IOUT = 3 mA 6
Low level output voltage VDD = 5 V VOL 250 mV VDD = 5 V, IOUT = 5 mA 6
Open drain output leakage current ILKG 300 nA VDD = VRESET = 5.5 V 6
MR logic low input VMR_L 0.3 V 6
MR logic high input VMR_H 1.4 V 6
CT pin charge current ICT 337 375 413 nA 6
CT pin comparator threshold voltage VCT 1.133 1.15 1.167 V 6
Reset time delay, TPS3870J, CT = Open tD 7 10 13 ms CT = Open 6
Reset time delay, TPS3870J, CT = 10 kΩ to VDD tD 140 200 260 ms CT = 10 kΩ to VDD 6
Overvoltage threshold tolerance option 4 VIT+(OV) -4 4 % Part number suffix J4330: OV tolerance 4% from nominal 3.30 V 3
Absolute maximum VDD VDD -0.3 6 V 5
Absolute maximum VRESET VRESET -0.3 6 V 5
Absolute maximum VCT VCT -0.3 6 V 5
Absolute maximum VSENSE VSENSE -0.3 6 V 5
Absolute maximum VMR VMR -0.3 6 V 5
Absolute maximum RESET output current IRESET -40 40 mA 5
Operating junction temperature TJ -40 150 °C 5
Operating free-air temperature TA -40 150 °C 5
Storage temperature Tstg -65 150 °C 5
Recommended VDD supply pin voltage VDD 1.7 5.5 V 5
Recommended VSENSE input pin voltage VSENSE 0 5.5 V 5
Recommended VRESET output pin voltage VRESET 0 5.5 V 5
Recommended VMR pin voltage VMR 0 5.5 V 5
Recommended IRESET output pin current IRESET 0.3 10 mA 5
Recommended junction temperature TJ -40 125 °C 5
Junction-to-ambient thermal resistance RθJA 184.2 °C/W DSE (WSON) package 6
Junction-to-case (top) thermal resistance RθJC(top) 30.6 °C/W DSE (WSON) package 6
Junction-to-board thermal resistance RθJB 86.4 °C/W DSE (WSON) package 6
Junction-to-top characterization parameter ΨJT 13.4 °C/W DSE (WSON) package 6
Junction-to-board characterization parameter ΨJB 86.1 °C/W DSE (WSON) package 6

CAD (KiCad official)

  • Symbol: TPS3870J4330DSERQ1
  • Footprint: Package_SON:WSON-6_1.5x1.5mm_P0.5mm
  • 3D model: WSON-6(1.5x1.5) (KiCad packages3D, STEP)
  • 3D model files: tps3870j4330dserq1-etched.step / tps3870j4330dserq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps3870j4330dserq1.step / tps3870j4330dserq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (29 pp, sha256 72987e164f5deded, retrieved 2026-11-05, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF