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TPS386040RGPR
Public Made by Adomby adom
Texas Instruments Supervisor And Reset ICs, QFN-20-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+58@@ -0,0 +1,58 @@+# TPS386040RGPR++**Texas Instruments** · Supervisor And Reset ICs · QFN-20-EP(4x4)++TPS386040RGPR from Texas Instruments, in a QFN-20-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | MR | input | Manual reset input for SVS-1; logic low level on this pin asserts RESET1. |+| 2 | CT4 | passive | Reset delay programming pin for SVS-4; connect to VDD through 40-kΩ to 200-kΩ resistor for fixed delay or capacitor > 220 pF to GND for programmable delay time. |+| 3 | CT3 | passive | Reset delay programming pin for SVS-3; connect to VDD through 40-kΩ to 200-kΩ resistor for fixed delay or capacitor > 220 pF to GND for programmable delay time. |+| 4 | CT2 | passive | Reset delay programming pin for SVS-2; connect to VDD through 40-kΩ to 200-kΩ resistor for fixed delay or capacitor > 220 pF to GND for programmable delay time. |+| 5 | CT1 | passive | Reset delay programming pin for SVS-1; connect to VDD through 40-kΩ to 200-kΩ resistor for fixed delay or capacitor > 220 pF to GND for programmable delay time. |+| 6 | SENSE4H | input | Rising monitor voltage input to SVS-4 that asserts RESET4 when voltage exceeds threshold voltage VITP; can monitor negative voltage via VREF pin or connect to GND if not used. |+| 7 | SENSE4L | input | Falling monitor voltage input to SVS-4 that asserts RESET4 when voltage drops below threshold voltage VITN. |+| 8 | SENSE3 | input | Monitor voltage input to SVS-3 that asserts RESET3 when voltage drops below threshold voltage VITN. |+| 9 | SENSE2 | input | Monitor voltage input to SVS-2 that asserts RESET2 when voltage drops below threshold voltage VITN. |+| 10 | SENSE1 | input | Monitor voltage input to SVS-1 that asserts RESET1 when voltage drops below threshold voltage VITN. |+| 11 | NC | unconnected | Not internal connection; TI recommends connecting this pin to GND pin (pin 12). |+| 12 | GND | power_in | Ground. |+| 13 | VREF | power_in | Reference voltage output intended to source current into external resistor network for monitoring negative power rail via SENSE4H; do not connect resistors to voltage higher than 1.2 V or connect capacitor only. |+| 14 | VDD | power_in | Supply voltage 1.8 V to 6.5 V; recommend 0.1-μF ceramic capacitor connected close to this pin. |+| 15 | RESET1 | output | Active low reset output of SVS-1; push-pull logic buffer that remains logic low when asserted and goes logic high after delay time programmed by CT1 when released. |+| 16 | RESET2 | output | Active low reset output of SVS-2; push-pull logic buffer that remains logic low when asserted and goes logic high after delay time programmed by CT2 when released. |+| 17 | RESET3 | output | Active low reset output of SVS-3; push-pull logic buffer that remains logic low when asserted and goes logic high after delay time programmed by CT3 when released. |+| 18 | RESET4 | output | Active low reset output of SVS-4; push-pull logic buffer that remains logic low when asserted and goes logic high after delay time programmed by CT4 when released. |+| 19 | WDO | output | Watchdog timer output; push-pull that goes logic low when WDT times out and stays logic high if no WDT time-out occurs. |+| 20 | WDI | input | Watchdog timer trigger input requiring positive or negative logic edge every 610 ms (typical) to prevent WDT time-out; timer starts from RESET1 release. |+| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | QFN-20-EP(4x4) |+| Category | Power Management (PMIC) |+| Pins | 21 |++## CAD (KiCad official)++- Symbol: `TPS386040RGPR`+- Footprint: `Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm`+- 3D model: QFN-20-EP(4x4) (KiCad packages3D, STEP)+- 3D model files: `tps386040rgpr-etched.step` / `tps386040rgpr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps386040rgpr.step` / `tps386040rgpr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps386040) (41 pp, sha256 `5b9d2375847111b6`, retrieved 2026-10-05, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps386040rgpr-datasheet.pdf)
page.jsonadded+239@@ -0,0 +1,239 @@+{+ "slug": "tps386040rgpr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Supervisor And Reset ICs, QFN-20-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tps386040rgpr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps386040rgpr.kicad_sym",+ "tps386040rgpr.kicad_mod",+ "tps386040rgpr.glb",+ "tps386040rgpr.step",+ "tps386040rgpr.lbr",+ "docs/hero.png",+ "docs/tps386040rgpr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tps386040rgpr-hero.glb",+ "tps386040rgpr-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPS386040RGPR",+ "manufacturer": "Texas Instruments",+ "package": "QFN-20-EP(4x4)",+ "pin_count": 21,+ "category": "Power Management (PMIC)",+ "subcategory": "Supervisor And Reset ICs",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps386040",+ "parts": {+ "symbol": "tps386040rgpr.kicad_sym",+ "footprint": "tps386040rgpr.kicad_mod",+ "model_3d": "tps386040rgpr-hero.glb",+ "model_3d_plain": "tps386040rgpr.glb",+ "model_3d_step": "tps386040rgpr-etched.step",+ "model_3d_step_plain": "tps386040rgpr.step",+ "lbr": "tps386040rgpr.lbr"+ },+ "distributor_links": {+ "lcsc": 702223,+ "digikey": "296-TPS386040RGPRTR-ND",+ "mouser": "595-TPS386040RGPR"+ },+ "distributor_check": {+ "checked_at": "2026-10-05T20:58:42Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-TPS386040RGPRTR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TPS386040RGPR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "MR",+ "type": "input",+ "description": "Manual reset input for SVS-1; logic low level on this pin asserts RESET1."+ },+ {+ "number": "2",+ "name": "CT4",+ "type": "passive",+ "description": "Reset delay programming pin for SVS-4; connect to VDD through 40-kΩ to 200-kΩ resistor for fixed delay or capacitor > 220 pF to GND for programmable delay time."+ },+ {+ "number": "3",+ "name": "CT3",+ "type": "passive",+ "description": "Reset delay programming pin for SVS-3; connect to VDD through 40-kΩ to 200-kΩ resistor for fixed delay or capacitor > 220 pF to GND for programmable delay time."+ },+ {+ "number": "4",+ "name": "CT2",+ "type": "passive",+ "description": "Reset delay programming pin for SVS-2; connect to VDD through 40-kΩ to 200-kΩ resistor for fixed delay or capacitor > 220 pF to GND for programmable delay time."+ },+ {+ "number": "5",+ "name": "CT1",+ "type": "passive",+ "description": "Reset delay programming pin for SVS-1; connect to VDD through 40-kΩ to 200-kΩ resistor for fixed delay or capacitor > 220 pF to GND for programmable delay time."+ },+ {+ "number": "6",+ "name": "SENSE4H",+ "type": "input",+ "description": "Rising monitor voltage input to SVS-4 that asserts RESET4 when voltage exceeds threshold voltage VITP; can monitor negative voltage via VREF pin or connect to GND if not used."+ },+ {+ "number": "7",+ "name": "SENSE4L",+ "type": "input",+ "description": "Falling monitor voltage input to SVS-4 that asserts RESET4 when voltage drops below threshold voltage VITN."+ },+ {+ "number": "8",+ "name": "SENSE3",+ "type": "input",+ "description": "Monitor voltage input to SVS-3 that asserts RESET3 when voltage drops below threshold voltage VITN."+ },+ {+ "number": "9",+ "name": "SENSE2",+ "type": "input",+ "description": "Monitor voltage input to SVS-2 that asserts RESET2 when voltage drops below threshold voltage VITN."+ },+ {+ "number": "10",+ "name": "SENSE1",+ "type": "input",+ "description": "Monitor voltage input to SVS-1 that asserts RESET1 when voltage drops below threshold voltage VITN."+ },+ {+ "number": "11",+ "name": "NC",+ "type": "unconnected",+ "description": "Not internal connection; TI recommends connecting this pin to GND pin (pin 12)."+ },+ {+ "number": "12",+ "name": "GND",+ "type": "power_in",+ "description": "Ground."+ },+ {+ "number": "13",+ "name": "VREF",+ "type": "power_in",+ "description": "Reference voltage output intended to source current into external resistor network for monitoring negative power rail via SENSE4H; do not connect resistors to voltage higher than 1.2 V or connect capacitor only."+ },+ {+ "number": "14",+ "name": "VDD",+ "type": "power_in",+ "description": "Supply voltage 1.8 V to 6.5 V; recommend 0.1-μF ceramic capacitor connected close to this pin."+ },+ {+ "number": "15",+ "name": "RESET1",+ "type": "output",+ "description": "Active low reset output of SVS-1; push-pull logic buffer that remains logic low when asserted and goes logic high after delay time programmed by CT1 when released."+ },+ {+ "number": "16",+ "name": "RESET2",+ "type": "output",+ "description": "Active low reset output of SVS-2; push-pull logic buffer that remains logic low when asserted and goes logic high after delay time programmed by CT2 when released."+ },+ {+ "number": "17",+ "name": "RESET3",+ "type": "output",+ "description": "Active low reset output of SVS-3; push-pull logic buffer that remains logic low when asserted and goes logic high after delay time programmed by CT3 when released."+ },+ {+ "number": "18",+ "name": "RESET4",+ "type": "output",+ "description": "Active low reset output of SVS-4; push-pull logic buffer that remains logic low when asserted and goes logic high after delay time programmed by CT4 when released."+ },+ {+ "number": "19",+ "name": "WDO",+ "type": "output",+ "description": "Watchdog timer output; push-pull that goes logic low when WDT times out and stays logic high if no WDT time-out occurs."+ },+ {+ "number": "20",+ "name": "WDI",+ "type": "input",+ "description": "Watchdog timer trigger input requiring positive or negative logic edge every 610 ms (typical) to prevent WDT time-out; timer starts from RESET1 release."+ },+ {+ "number": "21",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "exposed pad 21 added from the footprint",+ "dropped thermal pad ['EP'] absent from footprint"+ ],+ "pages_sent": 11,+ "cost_usd": 0.131,+ "at": "2026-10-05T20:58:28"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps386040",+ "pages": 41,+ "sha256": "5b9d2375847111b6",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 21,+ "described": 21,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}