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Contents

README

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TPS386040RGPR

Texas Instruments · Supervisor And Reset ICs · QFN-20-EP(4x4)

TPS386040RGPR from Texas Instruments, in a QFN-20-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 MR input Manual reset input for SVS-1; logic low level on this pin asserts RESET1.
2 CT4 passive Reset delay programming pin for SVS-4; connect to VDD through 40-kΩ to 200-kΩ resistor for fixed delay or capacitor > 220 pF to GND for programmable delay time.
3 CT3 passive Reset delay programming pin for SVS-3; connect to VDD through 40-kΩ to 200-kΩ resistor for fixed delay or capacitor > 220 pF to GND for programmable delay time.
4 CT2 passive Reset delay programming pin for SVS-2; connect to VDD through 40-kΩ to 200-kΩ resistor for fixed delay or capacitor > 220 pF to GND for programmable delay time.
5 CT1 passive Reset delay programming pin for SVS-1; connect to VDD through 40-kΩ to 200-kΩ resistor for fixed delay or capacitor > 220 pF to GND for programmable delay time.
6 SENSE4H input Rising monitor voltage input to SVS-4 that asserts RESET4 when voltage exceeds threshold voltage VITP; can monitor negative voltage via VREF pin or connect to GND if not used.
7 SENSE4L input Falling monitor voltage input to SVS-4 that asserts RESET4 when voltage drops below threshold voltage VITN.
8 SENSE3 input Monitor voltage input to SVS-3 that asserts RESET3 when voltage drops below threshold voltage VITN.
9 SENSE2 input Monitor voltage input to SVS-2 that asserts RESET2 when voltage drops below threshold voltage VITN.
10 SENSE1 input Monitor voltage input to SVS-1 that asserts RESET1 when voltage drops below threshold voltage VITN.
11 NC unconnected Not internal connection; TI recommends connecting this pin to GND pin (pin 12).
12 GND power_in Ground.
13 VREF power_in Reference voltage output intended to source current into external resistor network for monitoring negative power rail via SENSE4H; do not connect resistors to voltage higher than 1.2 V or connect capacitor only.
14 VDD power_in Supply voltage 1.8 V to 6.5 V; recommend 0.1-μF ceramic capacitor connected close to this pin.
15 RESET1 output Active low reset output of SVS-1; push-pull logic buffer that remains logic low when asserted and goes logic high after delay time programmed by CT1 when released.
16 RESET2 output Active low reset output of SVS-2; push-pull logic buffer that remains logic low when asserted and goes logic high after delay time programmed by CT2 when released.
17 RESET3 output Active low reset output of SVS-3; push-pull logic buffer that remains logic low when asserted and goes logic high after delay time programmed by CT3 when released.
18 RESET4 output Active low reset output of SVS-4; push-pull logic buffer that remains logic low when asserted and goes logic high after delay time programmed by CT4 when released.
19 WDO output Watchdog timer output; push-pull that goes logic low when WDT times out and stays logic high if no WDT time-out occurs.
20 WDI input Watchdog timer trigger input requiring positive or negative logic edge every 610 ms (typical) to prevent WDT time-out; timer starts from RESET1 release.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-20-EP(4x4)
Category Power Management (PMIC)
Pins 21

CAD (KiCad official)

  • Symbol: TPS386040RGPR
  • Footprint: Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm
  • 3D model: QFN-20-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: tps386040rgpr-etched.step / tps386040rgpr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps386040rgpr.step / tps386040rgpr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (41 pp, sha256 5b9d2375847111b6, retrieved 2026-10-05, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF