component
TPS386000QRGPRQ1
Public Made by Adomby adom
Texas Instruments Supervisor And Reset ICs, QFN-20-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"name": "MR",
"type": "input",
"description": "Manual reset input for SVS-1; a logic-low level asserts RESET1 or RESET1, and the input range is 0 V to VDD with VIL of 0.3 × VDD maximum."
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{
"number": "2",
"name": "CT4",
"type": "passive",
"description": "Reset delay programming pin for SVS-4; a 40 kΩ to 200 kΩ resistor to VDD or an open pin selects a fixed delay, while a capacitor above 220 pF to GND selects the programmable delay of 1.4 ms to 10 s."
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{
"number": "3",
"name": "CT3",
"type": "passive",
"description": "Reset delay programming pin for SVS-3; a 40 kΩ to 200 kΩ resistor to VDD or an open pin selects a fixed delay, while a capacitor above 220 pF to GND selects the programmable delay of 1.4 ms to 10 s."
},
{
"number": "4",
"name": "CT2",
"type": "passive",
"description": "Reset delay programming pin for SVS-2; a 40 kΩ to 200 kΩ resistor to VDD or an open pin selects a fixed delay, while a capacitor above 220 pF to GND selects the programmable delay of 1.4 ms to 10 s."
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{
"number": "5",
"name": "CT1",
"type": "passive",
"description": "Reset delay programming pin for SVS-1; a 40 kΩ to 200 kΩ resistor to VDD or an open pin selects a fixed delay, while a capacitor above 220 pF to GND selects the programmable delay of 1.4 ms to 10 s."
},
{
"number": "6",
"name": "SENSE4H",
"type": "input",
"description": "Rising monitor voltage input to SVS-4; RESET4 or RESET4 is asserted when the voltage exceeds the positive threshold VIT+ (400 mV typical, 396 mV to 404 mV), and it can also monitor the negative rail together with VREF."
},
{
"number": "7",
"name": "SENSE4L",
"type": "input",
"description": "Falling monitor voltage input to SVS-4; RESET4 or RESET4 is asserted when the voltage drops below the negative-going threshold VIT- (400 mV typical, 396 mV to 404 mV)."
},
{
"number": "8",
"name": "SENSE3",
"type": "input",
"description": "Monitor voltage input to SVS-3; RESET3 is asserted when the voltage drops below the threshold VIT- (400 mV typical, 396 mV to 404 mV)."
},
{
"number": "9",
"name": "SENSE2",
"type": "input",
"description": "Monitor voltage input to SVS-2; RESET2 is asserted when the voltage drops below the threshold VIT- (400 mV typical, 396 mV to 404 mV)."
},
{
"number": "10",
"name": "SENSE1",
"type": "input",
"description": "Monitor voltage input to SVS-1; RESET1 is asserted when the voltage drops below the threshold VIT- (400 mV typical, 396 mV to 404 mV)."
},
{
"number": "11",
"name": "NC",
"type": "unconnected",
"description": "Not connected internally; TI recommends connecting this pin to the GND pin (pin 12) next to it."
},
{
"number": "12",
"name": "GND",
"type": "power_in",
"description": "Ground reference pin for the device."
},
{
"number": "13",
"name": "VREF",
"type": "power_in",
"description": "Reference voltage output (1.2 V) intended only to source current into resistor(s); do not connect only capacitors to it and do not connect resistors to a voltage higher than VREF."
},
{
"number": "14",
"name": "VDD",
"type": "power_in",
"description": "Supply voltage with an allowed range of 1.8 V to 6.5 V; TI recommends a 0.1-µF ceramic capacitor placed close to this pin."
},
{
"number": "15",
"name": "RESET1",
"type": "output",
"description": "Active-low open-drain reset output of SVS-1 that stays in a low-impedance state while asserted and goes high-impedance after the delay set by CT1 once released."
},
{
"number": "16",
"name": "RESET2",
"type": "output",
"description": "Active-low open-drain reset output of SVS-2 that stays in a low-impedance state while asserted and goes high-impedance after the delay set by CT2 once released."
},
{
"number": "17",
"name": "RESET3",
"type": "output",
"description": "Active-low open-drain reset output of SVS-3 that stays in a low-impedance state while asserted and goes high-impedance after the delay set by CT3 once released."
},
{
"number": "18",
"name": "RESET4",
"type": "output",
"description": "Active-low open-drain reset output of SVS-4 that stays in a low-impedance state while asserted and goes high-impedance after the delay set by CT4 once released."
},
{
"number": "19",
"name": "WDO",
"type": "output",
"description": "Open-drain watchdog timer output that goes to a low-impedance state to GND when the WDT times out and stays high-impedance otherwise."
},
{
"number": "20",
"name": "WDI",
"type": "input",
"description": "Watchdog trigger input; a positive or negative logic edge every 610 ms (typical) prevents a WDT timeout, with the timer starting when RESET1 is released."
},
{
"number": "21",
"name": "PAD",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
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"exposed pad 21 added from the footprint"
],
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"at": "2026-10-21T01:22:52"
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"Package": "QFN-20-EP(4x4)",
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"name": "Watchdog timer trigger input voltage (WDI)",
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{
"name": "CT1 pin charging current",
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{
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"conditions": "CCTn > 220 pF, VCTn = 0.5 V",
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{
"name": "CTn pin threshold",
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{
"name": "MR and WDI logic low input",
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"min": 0,
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"conditions": "Upper limit printed as 0.3 × VDD",
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{
"name": "Low-level RESETn or RESETn output voltage",
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{
"name": "Low-level RESETn or RESETn output voltage",
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"conditions": "SENSEn = 0 V, 1.3 V < VDD < 1.8 V, IOL = 0.4 mA",
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"name": "Low-level WDO output voltage",
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{
"name": "RESETn, RESETn, WDO, and WDO leakage current",
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"conditions": "VRESETn = 6.5 V, RESETn, RESETn, WDO, and WDO are logic high",
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{
"name": "Reference voltage output",
"symbol": "VREF",
"kind": "electrical",
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"min": 1.18,
"typ": 1.2,
"max": 1.22,
"conditions": "1 μA < IVREF < 0.2 mA (source only, no sink)",
"source_page": 6,
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{
"name": "RESETn delay time (CTn = Open)",
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"min": 14,
"typ": 20,
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{
"name": "RESETn delay time (CTn = VDD)",
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"kind": "timing",
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"min": 225,
"typ": 300,
"max": 375,
"conditions": "CTn = VDD",
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{
"name": "Watchdog timer time-out period",
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"min": 450,
"typ": 600,
"max": 750,
"conditions": "",
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{
"name": "Junction-to-ambient thermal resistance",
"symbol": "RθJA",
"kind": "thermal",
"unit": "°C/W",
"min": null,
"typ": 50.8,
"max": null,
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{
"name": "Junction-to-case (top) thermal resistance",
"symbol": "RθJC(top)",
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{
"name": "Junction-to-board thermal resistance",
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{
"name": "Junction-to-top characterization parameter",
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