component
TPS3852H33DRBR
Public Made by Adomby adom
Texas Instruments Supervisor And Reset ICs, SON-8-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+46@@ -0,0 +1,46 @@+# TPS3852H33DRBR++**Texas Instruments** · Supervisor And Reset ICs · SON-8-EP(3x3)++TPS3852H33DRBR from Texas Instruments, in a SON-8-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VDD | power_in | Supply voltage input with recommended operating range of 1.6 V to 6.5 V; 0.1-μF bypass capacitor recommended for noisy systems. |+| 2 | CWD | input | Programmable watchdog timeout input; connect external timing capacitor (0.1 nF to 1000 nF) to GND, or 10-kΩ resistor to VDD, or leave unconnected to select preset watchdog timeouts. |+| 3 | MR | input | Manual reset input with internal pull-up to VDD; logical low asserts RESET output for fixed reset delay (tRST). |+| 4 | GND | power_in | Ground connection pin (0 V reference). |+| 5 | SET1 | input | Watchdog disable logic input; grounding this pin disables the watchdog timer. |+| 6 | WDI | input | Watchdog input requiring falling-edge transition between lower window boundary (tWDL max) and upper window boundary (tWDU min) to prevent watchdog timeout assertion. |+| 7 | WDO | output | Open-drain watchdog output that asserts low when watchdog timeout occurs (only when RESET is high) for reset delay period (tRST); connect via 1-kΩ to 100-kΩ pull-up resistor to desired voltage rail. |+| 8 | RESET | output | Open-drain reset output that asserts low when VDD falls below undervoltage threshold (VITN) or during power-on-reset; connect via 1-kΩ to 100-kΩ pull-up resistor to desired pullup voltage rail. |+| 9 | Thermal Pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SON-8-EP(3x3) |+| Category | Power Management (PMIC) |+| Pins | 9 |++## CAD (KiCad official)++- Symbol: `TPS3852H33DRBR`+- Footprint: `Package_SON:WSON-8-1EP_3x3mm_P0.5mm_EP1.6x2.0mm`+- 3D model: SON-8-EP(3x3) (KiCad packages3D, STEP)+- 3D model files: `tps3852h33drbr-etched.step` / `tps3852h33drbr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps3852h33drbr.step` / `tps3852h33drbr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps3852) (31 pp, sha256 `e15c9895ef25fff7`, retrieved 2026-10-03, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps3852h33drbr-datasheet.pdf)
page.jsonadded+167@@ -0,0 +1,167 @@+{+ "slug": "tps3852h33drbr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Supervisor And Reset ICs, SON-8-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tps3852h33drbr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps3852h33drbr.kicad_sym",+ "tps3852h33drbr.kicad_mod",+ "tps3852h33drbr.glb",+ "tps3852h33drbr.step",+ "tps3852h33drbr.lbr",+ "docs/hero.png",+ "docs/tps3852h33drbr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tps3852h33drbr-hero.glb",+ "tps3852h33drbr-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPS3852H33DRBR",+ "manufacturer": "Texas Instruments",+ "package": "SON-8-EP(3x3)",+ "pin_count": 9,+ "category": "Power Management (PMIC)",+ "subcategory": "Supervisor And Reset ICs",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps3852",+ "parts": {+ "symbol": "tps3852h33drbr.kicad_sym",+ "footprint": "tps3852h33drbr.kicad_mod",+ "model_3d": "tps3852h33drbr-hero.glb",+ "model_3d_plain": "tps3852h33drbr.glb",+ "model_3d_step": "tps3852h33drbr-etched.step",+ "model_3d_step_plain": "tps3852h33drbr.step",+ "lbr": "tps3852h33drbr.lbr"+ },+ "distributor_links": {+ "lcsc": 2066812,+ "digikey": "296-51965-2-ND",+ "mouser": "595-TPS3852H33DRBR"+ },+ "distributor_check": {+ "checked_at": "2026-10-03T02:34:08Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-51965-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TPS3852H33DRBR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VDD",+ "type": "power_in",+ "description": "Supply voltage input with recommended operating range of 1.6 V to 6.5 V; 0.1-μF bypass capacitor recommended for noisy systems."+ },+ {+ "number": "2",+ "name": "CWD",+ "type": "input",+ "description": "Programmable watchdog timeout input; connect external timing capacitor (0.1 nF to 1000 nF) to GND, or 10-kΩ resistor to VDD, or leave unconnected to select preset watchdog timeouts."+ },+ {+ "number": "3",+ "name": "MR",+ "type": "input",+ "description": "Manual reset input with internal pull-up to VDD; logical low asserts RESET output for fixed reset delay (tRST)."+ },+ {+ "number": "4",+ "name": "GND",+ "type": "power_in",+ "description": "Ground connection pin (0 V reference)."+ },+ {+ "number": "5",+ "name": "SET1",+ "type": "input",+ "description": "Watchdog disable logic input; grounding this pin disables the watchdog timer."+ },+ {+ "number": "6",+ "name": "WDI",+ "type": "input",+ "description": "Watchdog input requiring falling-edge transition between lower window boundary (tWDL max) and upper window boundary (tWDU min) to prevent watchdog timeout assertion."+ },+ {+ "number": "7",+ "name": "WDO",+ "type": "output",+ "description": "Open-drain watchdog output that asserts low when watchdog timeout occurs (only when RESET is high) for reset delay period (tRST); connect via 1-kΩ to 100-kΩ pull-up resistor to desired voltage rail."+ },+ {+ "number": "8",+ "name": "RESET",+ "type": "output",+ "description": "Open-drain reset output that asserts low when VDD falls below undervoltage threshold (VITN) or during power-on-reset; connect via 1-kΩ to 100-kΩ pull-up resistor to desired pullup voltage rail."+ },+ {+ "number": "9",+ "name": "Thermal Pad",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Thermal pad (exposed pad) present in SON-8-EP package but not assigned a pin number in datasheet; in",+ "exposed pad 9 added from the footprint"+ ],+ "pages_sent": 7,+ "cost_usd": 0.0865,+ "at": "2026-10-03T02:33:39"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps3852",+ "pages": 31,+ "sha256": "e15c9895ef25fff7",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 9,+ "described": 9,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}