component
TPS3852H33DRBR
Public Made by Adomby adom
Texas Instruments Supervisor And Reset ICs, SON-8-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS3852H33DRBR
Texas Instruments · Supervisor And Reset ICs · SON-8-EP(3x3)
TPS3852H33DRBR from Texas Instruments, in a SON-8-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Supply voltage input with recommended operating range of 1.6 V to 6.5 V; 0.1-μF bypass capacitor recommended for noisy systems. |
| 2 | CWD | input | Programmable watchdog timeout input; connect external timing capacitor (0.1 nF to 1000 nF) to GND, or 10-kΩ resistor to VDD, or leave unconnected to select preset watchdog timeouts. |
| 3 | MR | input | Manual reset input with internal pull-up to VDD; logical low asserts RESET output for fixed reset delay (tRST). |
| 4 | GND | power_in | Ground connection pin (0 V reference). |
| 5 | SET1 | input | Watchdog disable logic input; grounding this pin disables the watchdog timer. |
| 6 | WDI | input | Watchdog input requiring falling-edge transition between lower window boundary (tWDL max) and upper window boundary (tWDU min) to prevent watchdog timeout assertion. |
| 7 | WDO | output | Open-drain watchdog output that asserts low when watchdog timeout occurs (only when RESET is high) for reset delay period (tRST); connect via 1-kΩ to 100-kΩ pull-up resistor to desired voltage rail. |
| 8 | RESET | output | Open-drain reset output that asserts low when VDD falls below undervoltage threshold (VITN) or during power-on-reset; connect via 1-kΩ to 100-kΩ pull-up resistor to desired pullup voltage rail. |
| 9 | Thermal Pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SON-8-EP(3x3) |
| Category | Power Management (PMIC) |
| Pins | 9 |
CAD (KiCad official)
- Symbol:
TPS3852H33DRBR - Footprint:
Package_SON:WSON-8-1EP_3x3mm_P0.5mm_EP1.6x2.0mm - 3D model: SON-8-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
tps3852h33drbr-etched.step/tps3852h33drbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps3852h33drbr.step/tps3852h33drbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (31 pp, sha256
e15c9895ef25fff7, retrieved 2026-10-03, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).