TPS3851H50SQDRBRQ1

Texas Instruments · Supervisor And Reset ICs · SON-8-EP(3x3)

TPS3851H50SQDRBRQ1 from Texas Instruments, in a SON-8-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VDD	power_in	Supply voltage pin rated 1.6 V to 6.5 V, and a 0.1 µF bypass capacitor is recommended for noisy systems.
2	CWD	input	Programmable watchdog timeout input, where a capacitor to GND sets the timeout, or a 10 kΩ pull-up to VDD or an unconnected pin selects the factory-programmed timeout.
3	MR	input	Manual reset input, where a logic low triggers RESET, the pin is internally pulled up, and RESET stays low for tRST after MR goes high again.
4	GND	power_in	Ground pin, and the thermal pad is internally connected to GND and should be tied to a large ground plane.
5	SET1	input	Logic input where tying SET1 to GND disables the watchdog timer, and SET1 together with CWD selects the watchdog timeout.
6	WDI	input	Watchdog input that requires a falling edge before the watchdog timeout (tWD) ends, and must be driven to VDD or GND when the watchdog is disabled.
7	WDO	output	Watchdog output, open-drain, which requires a 1 kΩ to 100 kΩ pull-up to VPU, goes low on a watchdog timeout, and is high impedance when RESET is asserted.
8	RESET	output	Reset output, open-drain, which requires a 1 kΩ to 100 kΩ pull-up to VPU, goes low when VDD falls below VITN and stays low for tRST after VDD recovers above VITN + VHYST.
9	Thermal Pad	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SON-8-EP(3x3)
Category	Power Management (PMIC)
Pins	9

CAD (KiCad official)

Symbol: TPS3851H50SQDRBRQ1
Footprint: Package_SON:WSON-8-1EP_3x3mm_P0.5mm_EP1.6x2.0mm
3D model: SON-8-EP(3x3) (KiCad packages3D, STEP)
3D model files: tps3851h50sqdrbrq1-etched.step / tps3851h50sqdrbrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps3851h50sqdrbrq1.step / tps3851h50sqdrbrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (39 pp, sha256 187a2d3c4a847f7d, retrieved 2026-10-11, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# TPS3851H50SQDRBRQ1

**Texas Instruments** · Supervisor And Reset ICs · SON-8-EP(3x3)

TPS3851H50SQDRBRQ1 from Texas Instruments, in a SON-8-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Supply voltage pin rated 1.6 V to 6.5 V, and a 0.1 µF bypass capacitor is recommended for noisy systems. |
| 2 | CWD | input | Programmable watchdog timeout input, where a capacitor to GND sets the timeout, or a 10 kΩ pull-up to VDD or an unconnected pin selects the factory-programmed timeout. |
| 3 | MR | input | Manual reset input, where a logic low triggers RESET, the pin is internally pulled up, and RESET stays low for tRST after MR goes high again. |
| 4 | GND | power_in | Ground pin, and the thermal pad is internally connected to GND and should be tied to a large ground plane. |
| 5 | SET1 | input | Logic input where tying SET1 to GND disables the watchdog timer, and SET1 together with CWD selects the watchdog timeout. |
| 6 | WDI | input | Watchdog input that requires a falling edge before the watchdog timeout (tWD) ends, and must be driven to VDD or GND when the watchdog is disabled. |
| 7 | WDO | output | Watchdog output, open-drain, which requires a 1 kΩ to 100 kΩ pull-up to VPU, goes low on a watchdog timeout, and is high impedance when RESET is asserted. |
| 8 | RESET | output | Reset output, open-drain, which requires a 1 kΩ to 100 kΩ pull-up to VPU, goes low when VDD falls below VITN and stays low for tRST after VDD recovers above VITN + VHYST. |
| 9 | Thermal Pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SON-8-EP(3x3) |
| Category | Power Management (PMIC) |
| Pins | 9 |

## CAD (KiCad official)

- Symbol: `TPS3851H50SQDRBRQ1`
- Footprint: `Package_SON:WSON-8-1EP_3x3mm_P0.5mm_EP1.6x2.0mm`
- 3D model: SON-8-EP(3x3) (KiCad packages3D, STEP)
- 3D model files: `tps3851h50sqdrbrq1-etched.step` / `tps3851h50sqdrbrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps3851h50sqdrbrq1.step` / `tps3851h50sqdrbrq1.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps3851-q1) (39 pp, sha256 `187a2d3c4a847f7d`, retrieved 2026-10-11, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tps3851h50sqdrbrq1-datasheet.pdf)