component
TPS3851H33EDRBT
Public Made by Adomby adom
Texas Instruments Supervisor And Reset ICs, VSON-8-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS3851H33EDRBT
Texas Instruments · Supervisor And Reset ICs · VSON-8-EP(3x3)
TPS3851H33EDRBT from Texas Instruments, in a VSON-8-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Supply voltage input, 1.6V to 6.5V range; add 0.1µF bypass capacitor for noisy applications. |
| 2 | CWD | input | Programmable watchdog timeout input; configure via external capacitor to GND, 10kΩ pull-up to VDD, or left unconnected; charging current 375nA typical; threshold 1.196-1.224V. |
| 3 | MR | input | Manual reset input with internal 500-700nA pull-up; logic low pulse (minimum 1µs) triggers RESET output; internally pulled high when unused. |
| 4 | GND | power_in | Ground reference; internally connected to thermal pad; connect thermal pad to large ground plane. |
| 5 | SET1 | input | Logic input to enable/disable watchdog timer; low <0.25V disables watchdog, high >0.8V enables operation; settling time 150µs when transitioning from disabled to enabled. |
| 6 | WDI | input | Watchdog timer input responsive to falling edge; minimum pulse duration 50ns; logic low <0.3×VDD, logic high >0.8×VDD; must be driven to VDD or GND when watchdog disabled. |
| 7 | WDO | output | Open-drain watchdog output driven low upon timeout for tRST delay (170-230ms) only when RESET is high, high-impedance when RESET low; maximum output low 0.4V at 3mA sink current. |
| 8 | RESET | output | Open-drain reset output driven low when VDD falls below undervoltage threshold VITN, released high-impedance after tRST delay (170-230ms); maximum output low 0.4V at 3mA; requires 1-100kΩ pull-up resistor. |
| 9 | Thermal Pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSON-8-EP(3x3) |
| Category | Power Management (PMIC) |
| Pins | 9 |
CAD (KiCad official)
- Symbol:
TPS3851H33EDRBT - Footprint:
Package_SON:VSON-8-1EP_3x3mm_P0.65mm_EP1.6x2.4mm - 3D model: VSON-8-EP(3x3), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal VQFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
tps3851h33edrbt-etched.step/tps3851h33edrbt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps3851h33edrbt.step/tps3851h33edrbt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (36 pp, sha256
45ddb32c5436aeef, retrieved 2026-10-07, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).