component

TPS3840PH45DBVR

Public Made by Adom

by adom

Texas Instruments Supervisor And Reset ICs, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tps3840ph45dbvrfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 1h ago
viewers tps3840ph45dbvr: viewers · Ray 1h ago
package.json Publish 0.1.0 · Ray 1h ago
page.json Set visibility: public · Ray 1h ago
README.md Initial commit: component/tps3840ph45dbvr · Ray 1h ago
tps3840ph45dbvr-etched.glb tps3840ph45dbvr: factory component page (tier=lcsc) · Ray 1h ago
tps3840ph45dbvr-etched.step tps3840ph45dbvr: factory component page (tier=lcsc) · Ray 1h ago
tps3840ph45dbvr-hero.glb Publish 0.1.0 · Ray 1h ago
tps3840ph45dbvr-hero.overlay.json Publish 0.1.0 · Ray 1h ago
tps3840ph45dbvr.glb Publish 0.1.0 · Ray 1h ago
tps3840ph45dbvr.kicad_mod Publish 0.1.0 · Ray 1h ago
tps3840ph45dbvr.kicad_sym Publish 0.1.0 · Ray 1h ago
tps3840ph45dbvr.lbr Publish 0.1.0 · Ray 1h ago
tps3840ph45dbvr.step Publish 0.1.0 · Ray 1h ago

TPS3840PH45DBVR

Texas Instruments · Supervisor And Reset ICs · SOT-23-5

TPS3840PH45DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RESET output High-level active reset output; asserts high when VDD drops below VIT- (4.5V) or MR is pulled low, and remains high for reset delay time tD before releasing to logic low.
2 VDD power_in Power supply input voltage (1.5V to 10V); monitored by internal comparator for undervoltage condition.
3 GND power_in Ground reference return.
4 MR input Manual reset input active low; pulling below 600mV triggers reset output independent of VDD level; leave floating or above 0.7×VDD for normal VDD-monitored operation.
5 CT passive Timing capacitor input; external capacitor between this pin and ground programs reset delay time from 50µs (floating) to 6.2s (10µF).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

CAD (KiCad official)

  • Symbol: TPS3840PH45DBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tps3840ph45dbvr-etched.step / tps3840ph45dbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps3840ph45dbvr.step / tps3840ph45dbvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (50 pp, sha256 f8bde0a1e19632a5, retrieved 2026-10-07, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF