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TPS3840DL46DBVRQ1

Texas Instruments · Supervisor And Reset ICs · SOT-23-5

TPS3840DL46DBVRQ1 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RESET output Active-low open-drain output driven low when MR pin is pulled to logic low or VDD falls below negative voltage threshold VIT-, remaining asserted for programmed delay time tD.
2 VDD power_in Supply voltage input monitored by TPS3840-Q1 with operating range 1.5V to 10V.
3 GND power_in Ground reference.
4 MR input Manual reset input pin; pull to logic low (VMR_L) to assert reset output, can be left floating when not in use.
5 CT passive Capacitor time delay pin for programmable reset delay; connect external capacitor to adjust delay from 50µs (no capacitor) to 6.2s (10µF).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

CAD (KiCad official)

  • Symbol: TPS3840DL46DBVRQ1
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tps3840dl46dbvrq1-etched.step / tps3840dl46dbvrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps3840dl46dbvrq1.step / tps3840dl46dbvrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (38 pp, sha256 cf309c7c640e17d6, retrieved 2026-10-06, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF