component
TPS3840DL46DBVR
Public Made by Adomby adom
Texas Instruments Supervisor And Reset ICs, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
TPS3840DL46DBVR
Texas Instruments · Supervisor And Reset ICs · SOT-23-5
TPS3840DL46DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RESET | tri_state | Open-drain active-low reset output; asserted to logic low when MR is pulled low or VDD drops below negative voltage threshold VIT- (4.6 V); released to logic high after reset delay time tD when MR returns to floating/high and VDD rises above VIT+ (4.8 V nominal). |
| 2 | VDD | power_in | Input power supply voltage (1.5 V to 10 V nominal); internally monitored by TPS3840 for voltage supervision and threshold comparison. |
| 3 | GND | power_in | Ground reference. |
| 4 | MR | input | Active-low manual reset input; pull below 600 mV (VMR_L) to assert reset output; release or drive above 0.7×VDD (VMR_H) for normal operation; can be left floating when not used due to internal 100 kΩ pull-up. |
| 5 | CT | passive | Capacitor timing terminal for user-programmable reset delay time; connect external capacitor (0 to 10 µF) between CT and GND to set tD from 50 µs minimum (no capacitor) to 6.2 s (10 µF); leave floating for 50 µs fixed delay. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
CAD (KiCad official)
- Symbol:
TPS3840DL46DBVR - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
tps3840dl46dbvr-etched.step/tps3840dl46dbvr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps3840dl46dbvr.step/tps3840dl46dbvr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (50 pp, sha256
f1b5f7713745f4db, retrieved 2026-09-26, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS3840DL46DBVR
**Texas Instruments** · Supervisor And Reset ICs · SOT-23-5
TPS3840DL46DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RESET | tri_state | Open-drain active-low reset output; asserted to logic low when MR is pulled low or VDD drops below negative voltage threshold VIT- (4.6 V); released to logic high after reset delay time tD when MR returns to floating/high and VDD rises above VIT+ (4.8 V nominal). |
| 2 | VDD | power_in | Input power supply voltage (1.5 V to 10 V nominal); internally monitored by TPS3840 for voltage supervision and threshold comparison. |
| 3 | GND | power_in | Ground reference. |
| 4 | MR | input | Active-low manual reset input; pull below 600 mV (VMR_L) to assert reset output; release or drive above 0.7×VDD (VMR_H) for normal operation; can be left floating when not used due to internal 100 kΩ pull-up. |
| 5 | CT | passive | Capacitor timing terminal for user-programmable reset delay time; connect external capacitor (0 to 10 µF) between CT and GND to set tD from 50 µs minimum (no capacitor) to 6.2 s (10 µF); leave floating for 50 µs fixed delay. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## CAD (KiCad official)
- Symbol: `TPS3840DL46DBVR`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `tps3840dl46dbvr-etched.step` / `tps3840dl46dbvr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps3840dl46dbvr.step` / `tps3840dl46dbvr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps3840) (50 pp, sha256 `f1b5f7713745f4db`, retrieved 2026-09-26, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps3840dl46dbvr-datasheet.pdf)