component
TPS3840DL42DBVRQ1
Public Made by Adomby adom
Texas Instruments Supervisor And Reset ICs, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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TPS3840DL42DBVRQ1
Texas Instruments · Supervisor And Reset ICs · SOT-23-5
TPS3840DL42DBVRQ1 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RESET | output | Active-low open-drain reset output that asserts for tD after MR is released above VMR_L and VDD rises above VIT+; absolute maximum voltage 12 V and RESET pin current ±70 mA. |
| 2 | VDD | power_in | Input supply voltage monitored by the device; recommended range 1.5 V to 10 V with absolute maximum 12 V. |
| 3 | GND | power_in | Ground reference for the device. |
| 4 | MR | input | Active-low manual reset input that asserts reset when pulled to VMR_L; it may be left floating when unused and must not be higher than VDD. |
| 5 | CT | passive | Reset delay programming pin where an external capacitor to GND sets tD (50 µs with no capacitor, up to 6.2 s with 10 µF), absolute maximum 5.5 V; leave floating for the smallest fixed delay. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input supply voltage | VDD | 1.5 | 10 | V | 6 | ||
| Negative-going input threshold accuracy | VIT- | -1.5 | 1 | 1.5 | % | -40°C to 125°C | 6 |
| Hysteresis on VIT- pin | VHYS | 175 | 200 | 225 | mV | VIT- = 3.1 V to 4.9 V | 6 |
| Supply current into VDD pin | IDD | 700 | nA | VDD = 1.5 V < VDD < 10 V, VDD > VIT+, TA = -40°C to 125°C | 6 | ||
| Manual reset logic low input | VMR_L | 600 | mV | 6 | |||
| CT pin internal resistance | RCT | 350 | 500 | 650 | kΩ | 6 | |
| Power on reset voltage | VPOR | 950 | mV | VOL(max) = 0.2 V, IOUT(Sink) = 5.6 uA | 6 | ||
| Low level output voltage | VOL | 200 | mV | 1.5 V < VDD < 5 V, VDD < VIT-, IOUT(Sink) = 2 mA | 6 | ||
| Open-drain output leakage current | Ilkg(OD) | 90 | nA | RESET pin in High Impedance, VDD = VRESET = 5.5 V, VIT+ < VDD | 6 | ||
| Startup delay | tSTRT | 100 | 220 | 350 | µs | CT pin open | 7 |
| Propagation detect delay for VDD falling below VIT- | tP_HL | 30 | µs | VDD = VIT+ to (VIT-) - 10% | 7 | ||
| Input supply voltage (recommended) | VDD | 1.5 | 10 | V | 5 | ||
| RESET pin and RESET pin voltage | VRESET, VRESET | 0 | 10 | V | 5 | ||
| RESET pin and RESET pin current | IRESET, IRESET | -5 | 5 | mA | 5 | ||
| Junction temperature (free air temperature) | TJ | -40 | 125 | °C | 5 | ||
| Input supply voltage (absolute maximum) | VDD | -0.3 | 12 | V | 5 | ||
| RESET (TPS3840DL) voltage | RESET | -0.3 | 12 | V | TPS3840DL | 5 | |
| Manual reset pin voltage (absolute maximum) | MR | -0.3 | 12 | V | 5 | ||
| CT pin voltage | CT | -0.3 | 5.5 | V | 5 | ||
| RESET pin and RESET pin current (absolute maximum) | RESET, RESET | -70 | 70 | mA | 5 | ||
| Operating junction temperature | TJ | -40 | 150 | °C | 5 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 5 | ||
| Reset time delay (no capacitor) | tD | 50 | µs | CT pin = open | 7 | ||
| Reset time delay (10 nF) | tD | 6.2 | ms | CT pin = 10 nF | 7 | ||
| Reset time delay (1 µF) | tD | 619 | ms | CT pin = 1 µF | 7 | ||
| Junction-to-ambient thermal resistance | RθJA | 187.5 | °C/W | 5 | |||
| Junction-to-case (top) thermal resistance | RθJC(top) | 109.2 | °C/W | 5 | |||
| Junction-to-board thermal resistance | RθJB | 92.8 | °C/W | 5 | |||
| Junction-to-top characterization parameter | ψJT | 35.4 | °C/W | 5 | |||
| Junction-to-board characterization parameter | ψJB | 92.5 | °C/W | 5 |
CAD (KiCad official)
- Symbol:
TPS3840DL42DBVRQ1 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
tps3840dl42dbvrq1-etched.step/tps3840dl42dbvrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps3840dl42dbvrq1.step/tps3840dl42dbvrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (39 pp, sha256
bcbd6b6ff60acd14, retrieved 2026-11-05, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).