component
TPS3840DL24DBVR
Public Made by Adomby adom
Texas Instruments Supervisor And Reset ICs, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS3840DL24DBVR
Texas Instruments · Supervisor And Reset ICs · SOT-23-5
TPS3840DL24DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RESET | output | Low-level active open-drain reset output; asserted low when MR < 600mV or VDD drops below 2.4V threshold; released to high-impedance after programmed reset delay tD; maximum leakage current 90nA. |
| 2 | VDD | power_in | Input power supply voltage (1.5V to 10V); monitored by internal comparator for voltage supervision; typical supply current 300nA, maximum 700nA at operating temperature -40°C to +125°C. |
| 3 | GND | power_in | Ground reference (0V return path); bypass capacitor connection point; recommended 0.1µF to 1µF ceramic capacitor for noise immunity. |
| 4 | MR | input | Manual reset input (logic low active); pulling below 600mV (VMR_L) immediately asserts reset; floating or above 0.7×VDD (VMR_H) releases reset after delay tD; internal 100kΩ pull-up resistor. |
| 5 | CT | passive | Capacitor timing pin for programmable reset delay; connect external capacitor (0 to 10µF) between CT and GND to set delay from 50µs (floating) to 6.2s (10µF); internal resistance 350-650kΩ. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
CAD (KiCad official)
- Symbol:
TPS3840DL24DBVR - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
tps3840dl24dbvr-etched.step/tps3840dl24dbvr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps3840dl24dbvr.step/tps3840dl24dbvr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (50 pp, sha256
f8bde0a1e19632a5, retrieved 2026-10-05, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS3840DL24DBVR
**Texas Instruments** · Supervisor And Reset ICs · SOT-23-5
TPS3840DL24DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RESET | output | Low-level active open-drain reset output; asserted low when MR < 600mV or VDD drops below 2.4V threshold; released to high-impedance after programmed reset delay tD; maximum leakage current 90nA. |
| 2 | VDD | power_in | Input power supply voltage (1.5V to 10V); monitored by internal comparator for voltage supervision; typical supply current 300nA, maximum 700nA at operating temperature -40°C to +125°C. |
| 3 | GND | power_in | Ground reference (0V return path); bypass capacitor connection point; recommended 0.1µF to 1µF ceramic capacitor for noise immunity. |
| 4 | MR | input | Manual reset input (logic low active); pulling below 600mV (VMR_L) immediately asserts reset; floating or above 0.7×VDD (VMR_H) releases reset after delay tD; internal 100kΩ pull-up resistor. |
| 5 | CT | passive | Capacitor timing pin for programmable reset delay; connect external capacitor (0 to 10µF) between CT and GND to set delay from 50µs (floating) to 6.2s (10µF); internal resistance 350-650kΩ. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## CAD (KiCad official)
- Symbol: `TPS3840DL24DBVR`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `tps3840dl24dbvr-etched.step` / `tps3840dl24dbvr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps3840dl24dbvr.step` / `tps3840dl24dbvr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps3840) (50 pp, sha256 `f8bde0a1e19632a5`, retrieved 2026-10-05, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps3840dl24dbvr-datasheet.pdf)