component

TPS3840DL20DBVR

Public Made by Adom

by adom

Texas Instruments Supervisor And Reset ICs, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tps3840dl20dbvrfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs tps3840dl20dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers tps3840dl20dbvr: viewers · Ray 4d ago
package.json Publish 0.1.0 · Ray 4d ago
page.json Set visibility: public · Ray 4d ago
README.md Initial commit: component/tps3840dl20dbvr · Ray 4d ago
tps3840dl20dbvr-etched.fit.json tps3840dl20dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tps3840dl20dbvr-etched.glb tps3840dl20dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tps3840dl20dbvr-etched.step tps3840dl20dbvr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
tps3840dl20dbvr.glb Publish 0.1.0 · Ray 4d ago
tps3840dl20dbvr.kicad_mod Publish 0.1.0 · Ray 4d ago
tps3840dl20dbvr.kicad_sym Publish 0.1.0 · Ray 4d ago
tps3840dl20dbvr.lbr Publish 0.1.0 · Ray 4d ago
tps3840dl20dbvr.step Publish 0.1.0 · Ray 4d ago

TPS3840DL20DBVR

Texas Instruments · Supervisor And Reset ICs · SOT-23-5

TPS3840DL20DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RESET output Low-level active reset output signal; pulled to logic low when MR pin is driven low or VDD drops below VIT-, remains low for reset delay time (tD) after recovery before releasing to logic high.
2 VDD power_in Input supply voltage from 1.5V to 10V; monitored by internal comparator to determine reset state.
3 GND power_in Ground connection.
4 MR input Manual reset input; pull to logic low to assert reset; apply logic high or leave floating for normal operation with internal pull-up resistor RMR = 100 kΩ.
5 CT passive Capacitor delay time pin; connect external capacitor (≤10µF) to program reset delay time; leave floating for minimum 50µs fixed delay.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

CAD (KiCad official)

  • Symbol: TPS3840DL20DBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tps3840dl20dbvr-etched.step / tps3840dl20dbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps3840dl20dbvr.step / tps3840dl20dbvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (50 pp, sha256 3bec00d25018344b, retrieved 2026-10-01, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF