component

TPS3838J25DBVR

Public Made by Adom

by adom

Texas Instruments Supervisor And Reset ICs, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tps3838j25dbvrfactory-2.0.0extractor-text

Verified TPS3838J25DBVR

by Ray · last 6 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

6 Nov 2026RayPublished by the parts factory: tier mfr, 5 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: TPS3838J25DBVR · SOT-23-5 · 5 pins
  • ✓copper: 5 copper pads, none touching another net
  • ✓datasheet: all 5 pin names found in the 33-page datasheet
  • ✓distributor: lcsc C2067055, digikey 296-41743-2-ND, mouser 595-TPS3838J25DBVR
  • ✓family: SOT-23-5
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-0ruztnwu/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 5 pins = 5 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 5 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ tps3838j25dbvr.kicad_sym✓ tps3838j25dbvr.kicad_mod✓ tps3838j25dbvr.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 19h ago
viewers tps3838j25dbvr: viewers · Ray 19h ago
package.json Publish 0.1.0 · Ray 19h ago
page.json Set visibility: public · Ray 19h ago
README.md Publish 0.1.0 · Ray 19h ago
tps3838j25dbvr-etched.glb Publish 0.1.0 · Ray 19h ago
tps3838j25dbvr-etched.step tps3838j25dbvr: factory component page (tier=mfr) · Ray 19h ago
tps3838j25dbvr-hero.glb tps3838j25dbvr: hero GLB from the etched model (keeps the MPN mark) · Ray 19h ago
tps3838j25dbvr-hero.overlay.json Publish 0.1.0 · Ray 19h ago
tps3838j25dbvr.glb Publish 0.1.0 · Ray 19h ago
tps3838j25dbvr.kicad_mod Publish 0.1.0 · Ray 19h ago
tps3838j25dbvr.kicad_sym Publish 0.1.0 · Ray 19h ago
tps3838j25dbvr.lbr Publish 0.1.0 · Ray 19h ago
tps3838j25dbvr.step Publish 0.1.0 · Ray 19h ago
verification.json Verified: Published by the parts factory: tier mfr, 5 pins · Ray 19h ago

TPS3838J25DBVR

Texas Instruments · Supervisor And Reset ICs · SOT-23-5

TPS3838J25DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CT input Capacitor Time Delay pin: connect to GND to set the reset delay to 10 ms, or to VDD to set it to 200 ms.
2 GND power_in Ground reference; all voltage values in the datasheet are with respect to GND.
3 MR input Manual reset input: logic-low activates RESET, and if unused it should be connected to VDD to minimize current consumption.
4 RESET output Active-low open-drain reset output that activates when VDD falls below VIT or MR goes low, and deasserts after the reset delay tD; a pullup resistor is required.
5 VDD power_in Input supply voltage monitored by the device, with a recommended operating range of 1.6 V to 6 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Negative-going input threshold voltage VIT 2.18 2.25 2.29 V TPS383xJ25; TA = -40°C to 85°C 5
Low-level output voltage RESET (TPS3838) VOL 0.4 V VDD = 1.8 V, IOL = 1 mA 5
Power-up reset voltage (TPS3838) 0.2 V VDD ≥ 1.1 V, IOL = 50 μA 5
High-level input current MR IIH -40 -60 -100 μA MR = 0.7 × VDD, VDD = 6 V 5
Low-level input current MR IIL -130 -200 -340 μA MR = 0 V, VDD = 6 V 6
High-level input current CT IIH -25 25 nA CT = VDD = 6 V 5
Low-level input current CT IIL -25 25 nA CT = 0 V, VDD = 6 V 6
High-level output current (TPS3838) IOH 25 nA VDD = VIT + 0.2 V, VOH = VDD 6
Supply current IDD 220 400 nA VDD > VIT, VDD < 3 V 6
Supply current IDD 250 450 nA VDD > VIT, VDD > 3 V 6
Supply current IDD 10 15 μA VDD < VIT 6
Supply voltage VDD 1.6 6 V 4
Voltage at CT, MR, RESET and RESET pins 0 V maximum VDD + 0.3 V 4
High-level input voltage VIH 0.7 × VDD 4
Low-level input voltage VIL 0.3 × VDD 5
Input transition rise and fall rate at MR Δt/ΔV 100 ns/V MR pin 5
Operating temperature TA -40 85 °C 5
Supply voltage VDD 7 V with respect to GND 4
All other pins -0.3 7 V with respect to GND 4
Maximum low output current IOL 5 mA 4
Maximum high output current IOH -5 mA 4
Input clamp current IIK -10 10 mA VI < 0 or VI > VDD 4
Output clamp current IOK -10 10 mA VO < 0 or VO > VDD 4
Operating temperature TA -40 85 °C 4
Storage temperature Tstg -65 150 °C 4
Pulse duration at VDD tW 6 μs At VDD, VIH = VIT + 0.2 V, VIL = VIT, 0.2 V 6
Pulse duration at MR tW 1 μs At MR, VDD ≥ VIT + 0.2 V, VIL = 0.3 × VDD, VIH = 0.7 × VDD 6
Delay time tD 5 10 15 ms VDD ≥ VIT + 0.2 V, MR = 0.7 × VDD, CT = GND 6
Delay time tD 100 200 300 ms VDD ≥ VIT + 0.2 V, MR = 0.7 × VDD, CT = VDD 6
Internal pullup resistor at MR 30 kΩ 6
Input capacitance at MR and CT CI 5 pF VI = 0 V to VDD 6
Propagation (delay) time, high-to-low-level output VDD to RESET (TPS3838) tPHL 10 μs VIL = VIT, 0.2 V, VIH = VIT + 0.2 V 6
Propagation (delay) time, high-to-low-level output VDD to RESET (TPS3838) tPHL 50 μs VIL = 1.6 V 6
Propagation (delay) time, high-to-low-level output MR to RESET (TPS3838) tPHL 0.3 μs VDD ≥ VIT + 0.2 V, VIL = 0.3 × VDD, VIL = 0.7 × VDD 6
Junction-to-ambient thermal resistance (DBV) RθJA 153.6 °C/W DBV (SOT), 5 pins 5
Junction-to-case (top) thermal resistance (DBV) RθJC(top) 108.1 °C/W DBV (SOT), 5 pins 5
Junction-to-board thermal resistance (DBV) RθJB 33.5 °C/W DBV (SOT), 5 pins 5
Junction-to-top characterization parameter (DBV) ψJT 10.9 °C/W DBV (SOT), 5 pins 5
Junction-to-board characterization parameter (DBV) ψJB 33.1 °C/W DBV (SOT), 5 pins 5
Hysteresis at VDD input VHYS 30 mV 1.7 V < VIT < 2.5 V 5

CAD (KiCad official)

  • Symbol: TPS3838J25DBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tps3838j25dbvr-etched.step / tps3838j25dbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps3838j25dbvr.step / tps3838j25dbvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (33 pp, sha256 6a2b25929a6d0dfb, retrieved 2026-11-06, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF