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TPS3837K33DBVR

Texas Instruments · Supervisor And Reset ICs · SOT-23-5

TPS3837K33DBVR from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CT input Capacitor time delay pin: connect to GND to set the reset delay to 10 ms, or connect to VDD to set it to 200 ms.
2 GND power_in Ground reference for the device; all voltages are specified with respect to GND.
3 MR input Manual reset input: a logic-low on MR activates RESET, and if unused it should be connected to VDD to minimize current consumption.
4 RESET output Active-high push-pull reset output that goes high when VDD falls below VIT or MR is driven low, and returns low after the reset delay tD once VDD exceeds VIT plus VHYS and MR is high.
5 VDD power_in Input supply voltage that the device monitors; recommended supply range is 1.6 V to 6 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

CAD (KiCad official)

  • Symbol: TPS3837K33DBVR
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tps3837k33dbvr-etched.step / tps3837k33dbvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps3837k33dbvr.step / tps3837k33dbvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (33 pp, sha256 6a2b25929a6d0dfb, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF