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TPS3836L30MDBVREP

Texas Instruments · Supervisor And Reset ICs · SOT-23-5

TPS3836L30MDBVREP from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CT input Reset delay select: connect to GND for a typical 10 ms delay or to VDD for a typical 200 ms delay.
2 GND power_in Ground.
3 MR input Active-low manual reset input with internal 33 kΩ pullup; connect to VDD if unused to minimize current consumption.
4 RESET output Active-low push-pull reset output (TPS3836), asserted when VDD is below VIT or MR is low, and released after the delay time td.
5 VDD power_in Supply voltage monitored against the fixed threshold VIT (2.64 V typ for L30); recommended range 1.6 V to 6 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

CAD (KiCad official)

  • Symbol: TPS3836L30MDBVREP
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tps3836l30mdbvrep-etched.step / tps3836l30mdbvrep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps3836l30mdbvrep.step / tps3836l30mdbvrep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (17 pp, sha256 2e5ccf72753dfadb, retrieved 2026-10-10, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF