# TPS3808G33QDBVRQ1

**Texas Instruments** · Supervisor and Reset ICs · SOT-23-6

TPS3808G33QDBVRQ1 from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RESET | output | Active-low open-drain reset output. Driven low when SENSE drops below VIT (3.07 V typ) or MR is pulled low; released high after the programmed reset delay once SENSE is above VIT and MR is high. Requires a 10 kΩ to 1 MΩ pull-up (may pull to a rail higher than VDD). Max IRESET = 5 mA. |
| 2 | GND | power_in | Device ground reference. |
| 3 | MR | input | Active-low manual reset input. Driving this pin low asserts RESET. Internally pulled to VDD through a ~90 kΩ resistor (70 kΩ min), so it may be left floating if unused. VIL ≤ 0.3·VDD, VIH ≥ 0.7·VDD. |
| 4 | CT | input | Reset-delay programming pin. Leaving open selects the fixed 20 ms delay; tying to VDD via a 40 kΩ resistor selects 300 ms; connecting a ground-referenced capacitor ≥100 pF programs a user delay of 1.25 ms to 10 s. Input capacitance ~5 pF. |
| 5 | SENSE | input | Voltage-sense input connected to the monitored supply. RESET is asserted when this pin drops below the threshold voltage VIT (3.07 V typical for the G33 option). Very high input impedance; ISENSE ≤ 25 nA. Recommended range 0 V to VDD. |
| 6 | VDD | power_in | Supply voltage, 1.8 V to 6.5 V (absolute max 7 V). Typical IDD = 2.4 µA at 3.3 V. Bypass with a 0.1 µF ceramic capacitor close to the pin. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-6 |
| Category | PMIC |
| Pins | 6 |

## Ordering variants

Same part, different packaging or reel option.

- `TPS3808G33QDBVRQ1`
- `TPS3808G33QDBVRQ1QDRVRQ1`

## CAD (KiCad official)

- Symbol: `TPS3808G33QDBVRQ1`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `tps3808g33qdbvrq1-etched.step` / `tps3808g33qdbvrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps3808g33qdbvrq1.step` / `tps3808g33qdbvrq1.glb` are the bare package body.

## 3D model downloads

Two STEP files. Same geometry, different body top:

| File | Size | Use it when |
|---|---|---|
| [`tps3808g33qdbvrq1.step`](tps3808g33qdbvrq1.step) | 97 KB | You want the bare part, or you mark your own boards. |
| [`tps3808g33qdbvrq1-etched.step`](tps3808g33qdbvrq1-etched.step) | 3.9 MB | You want the part with `TPS3808G33QDBVRQ1` already on it. |

The marking in the etched file is real recessed geometry cut into the solid, not a
texture or a decal: 896 faces against 117 in the bare model. It
survives export, section views, and rendering in any CAD tool, and it drops straight
into KiCad or Fusion with no extra setup.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tps3808g33qdbvrq1.pdf) (27 pp, sha256 `f3419820453e5366`, retrieved 2026-08-17, tier: manufacturer)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tps3808g33qdbvrq1-datasheet.pdf)