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TPS3808G12DBVT

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Texas Instruments Supervisor And Reset ICs, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tps3808g12dbvtfactory-2.0.0extractor-text

Verified TPS3808G12DBVT

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier mfr, 6 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: TPS3808G12DBVT · SOT-23-6 · 6 pins
  • ✓copper: 6 copper pads, none touching another net
  • ✓datasheet: all 6 pin names found in the 39-page datasheet
  • ✓distributor: lcsc C2068661, digikey 296-26942-2-ND, mouser 595-TPS3808G12DBVT
  • ✓family: SOT-23-6
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-2s80814d/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 6 pins = 6 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 6 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ tps3808g12dbvt.kicad_sym✓ tps3808g12dbvt.kicad_mod✓ tps3808g12dbvt.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 1d ago
viewers tps3808g12dbvt: viewers · Ray 1d ago
package.json Publish 0.1.0 · Ray 1d ago
page.json Set visibility: public · Ray 1d ago
README.md Publish 0.1.0 · Ray 1d ago
tps3808g12dbvt-etched.glb Publish 0.1.0 · Ray 1d ago
tps3808g12dbvt-etched.step tps3808g12dbvt: factory component page (tier=mfr) · Ray 1d ago
tps3808g12dbvt-hero.glb tps3808g12dbvt: hero GLB from the etched model (keeps the MPN mark) · Ray 1d ago
tps3808g12dbvt-hero.overlay.json Publish 0.1.0 · Ray 1d ago
tps3808g12dbvt.glb Publish 0.1.0 · Ray 1d ago
tps3808g12dbvt.kicad_mod Publish 0.1.0 · Ray 1d ago
tps3808g12dbvt.kicad_sym Publish 0.1.0 · Ray 1d ago
tps3808g12dbvt.lbr Publish 0.1.0 · Ray 1d ago
tps3808g12dbvt.step Publish 0.1.0 · Ray 1d ago
verification.json Verified: Published by the parts factory: tier mfr, 6 pins · Ray 1d ago

TPS3808G12DBVT

Texas Instruments · Supervisor And Reset ICs · SOT-23-6

TPS3808G12DBVT from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RESET output RESET is an open-drain output that is driven low when SENSE is below VIT or MR is low, remains low for the reset period after both recover, and needs a pull-up resistor from 10kΩ to 1MΩ.
2 GND power_in Ground reference for the device.
3 MR input Driving the manual reset pin low asserts RESET, and MR is internally pulled up to VDD by a 90kΩ resistor.
4 CT input Connecting CT to VDD through a 40kΩ to 200kΩ resistor or leaving it open gives fixed delay times, while a ground-referenced capacitor of 100pF or more gives a user-programmable delay.
5 SENSE input This pin is connected to the voltage to be monitored, and RESET is asserted if it drops below the threshold voltage VIT.
6 VDD power_in Supply voltage input, with a 0.1μF ceramic capacitor recommended close to this pin; the recommended input supply range is 1.7V to 6.5V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-6
Category Power Management (PMIC)
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input supply range VDD 1.7 6.5 V over operating free-air temperature range 5
SENSE pin voltage VSENSE 0 6.5 V over operating free-air temperature range 5
MR pin voltage VMR 0 6.5 V over operating free-air temperature range 5
RESET pin voltage VRESET 0 6.5 V over operating free-air temperature range 5
RESET pin current IRESET 0.0003 5 mA over operating free-air temperature range 5
Voltage VDD absolute maximum VDD -0.3 7 V over operating junction temperature range 5
Voltage VRESET, VMR, VSENSE absolute maximum VRESET, VMR, VSENSE -0.3 7 V over operating junction temperature range 5
Current RESET pin absolute maximum IRESET -5 5 mA over operating junction temperature range 5
Operating junction temperature TJ -40 150 °C over operating junction temperature range 5
Storage temperature Tstg -65 150 °C storage 5
Junction-to-ambient thermal resistance RθJA 180.9 °C/W DBV (SOT-23) 6 pins 5
Junction-to-case (top) thermal resistance RθJC(top) 117.8 °C/W DBV (SOT-23) 6 pins 5
Junction-to-board thermal resistance RθJB 27.8 °C/W DBV (SOT-23) 6 pins 5
Junction-to-top characterization parameter ψJT 18.9 °C/W DBV (SOT-23) 6 pins 5
Junction-to-board characterization parameter ψJB 27.3 °C/W DBV (SOT-23) 6 pins 5
Negative-going input threshold accuracy VIT -1.5 0.5 1.5 % VIT ≤ 3.3V 6
Negative-going input threshold accuracy VIT -1.25 0.5 1.25 % VIT ≤ 3.3V, -40°C < TJ < 85°C 6
Hysteresis on VIT pin (fixed versions) VHYS 1 2.5 % Fixed versions 6
Power-up reset voltage VPOR 0.8 V VOL (max) = 0.2V, IRESET = 15μA 6
Supply current IDD 2.4 5 μA VDD = 3.3V, RESET not asserted, MR, RESET, CT open 6
Supply current IDD 2.7 6 μA VDD = 6.5V, RESET not asserted, MR, RESET, CT open 6
Low-level output voltage VOL 0.3 V 1.3V ≤ VDD < 1.8V, IOL = 0.4mA 6
Low-level output voltage VOL 0.4 V 1.8V ≤ VDD ≤ 6.5V, IOL = 1mA 6
MR internal pullup resistance RMR 70 90 kΩ 6
Input current at SENSE pin (fixed versions) ISENSE 1.7 μA VSENSE = 6.5V 6
RESET leakage current IOH 300 nA V RESET = 6.5V, RESET not asserted 6
Input capacitance CT pin CIN 5 pF CT pin VIN = 0V to VDD 6
Input capacitance other pins CIN 5 pF Other pins VIN = 0V to 6.5V 6
Input pulse width to RESET (SENSE) tw 20 μs SENSE VIH = 1.05VIT, VIL = 0.95VIT 7
RESET delay time td 12 20 28 ms CT = Open, See Figure 6-1 7
RESET delay time td 180 300 420 ms CT = VDD 7
RESET delay time td 0.75 1.25 1.75 s CT = 130pF 7
RESET delay time td 0.62 1.03 1.44 s CT = 180nF 7
Propagation delay MR to RESET tpd 150 ns VIH = 0.7VDD, VIL = 0.3VDD 7
High-to-low-level RESET delay SENSE to RESET tpd 20 μs VIH = 1.05VIT, VIL = 0.95VIT 7

CAD (KiCad official)

  • Symbol: TPS3808G12DBVT
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: tps3808g12dbvt-etched.step / tps3808g12dbvt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps3808g12dbvt.step / tps3808g12dbvt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (39 pp, sha256 74d889c0f68af880, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF