component
TPS3702CX33QDDCRQ1
Public Made by Adomby adom
Texas Instruments Supervisor And Reset ICs, TSOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS3702CX33QDDCRQ1
Texas Instruments · Supervisor And Reset ICs · TSOT-23-6
TPS3702CX33QDDCRQ1 from Texas Instruments, in a TSOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | UV | output | Active-low open-drain undervoltage output that goes low when SENSE falls below the internal undervoltage threshold VIT-, and needs a pull-up resistor of 2.2 kΩ to 10,000 kΩ with an output current of 0.3 mA to 10 mA. |
| 2 | GND | power_in | Ground reference pin for the device. |
| 3 | SENSE | input | Input for the monitored supply rail, with a recommended input voltage of 0 V to 6.5 V, that drives UV low below the undervoltage threshold and OV low above the overvoltage threshold. |
| 4 | SET | input | Threshold configuration input with a recommended pin voltage of 0 V to 6.5 V, used to select the desired threshold voltage configuration per Table 8-1. |
| 5 | VDD | power_in | Supply voltage input that must be within 2 V to 18 V, with a 0.1 µF ceramic capacitor recommended close to this pin. |
| 6 | OV | output | Active-low open-drain overvoltage output that goes low when SENSE rises above the internal overvoltage threshold VIT+, and needs a pull-up resistor to the desired pull-up voltage. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage range | VDD | 2 | 18 | V | 5 | ||
| Positive-going threshold accuracy | VIT+(OV) | -0.9 | 0.25 | 0.9 | % | VSET ≤ VIL(SET), VSET ≥ VIH(SET) | 5 |
| Negative-going threshold accuracy | VIT-(UV) | -0.9 | 0.25 | 0.9 | % | VSET ≤ VIL(SET), VSET ≥ VIH(SET) | 5 |
| Hysteresis voltage | VHYS | 0.3 | 0.55 | 0.8 | % | TPS3702xXx | 5 |
| Power-on reset voltage | V(POR) | 0.8 | V | VOL(max) = 0.25V, IOUT = 15µA | 5 | ||
| Supply current | IDD | 6 | 10 | µA | VDD = 2V | 5 | |
| Supply current | IDD | 7 | 12 | µA | VDD ≥ 5V | 5 | |
| Input current, SENSE pin | ISENSE | 1 | 1.5 | µA | VSENSE = 5V | 5 | |
| Low-level output voltage | VOL | 250 | mV | VDD = 1.3V, IOUT = 0.4mA | 5 | ||
| Low-level SET pin input voltage | VIL(set) | 250 | mV | 5 | |||
| High-level SET pin input voltage | VIH(set) | 750 | mV | 5 | |||
| Open-drain output leakage current | ID(leak) | 300 | nA | VPU = VDD | 5 | ||
| Undervoltage lockout | UVLO | 1.3 | 1.7 | V | VDD falling | 5 | |
| Recommended supply pin voltage | VDD | 2 | 18 | V | 4 | ||
| Input pin voltage | VSENSE | 0 | 6.5 | V | 4 | ||
| SET pin voltage | VSET | 0 | 6.5 | V | 4 | ||
| Output pin voltage | VUV, VOV | 0 | 18 | V | 4 | ||
| Output pin current | IUV, IOV | 0.3 | 10 | mA | 4 | ||
| Pull-up resistor | RPU | 2.2 | 10000 | kΩ | 4 | ||
| Voltage, supply pin | VDD | -0.3 | 20 | V | 4 | ||
| Voltage, output pins | VUV, VOV | -0.3 | 20 | V | 4 | ||
| Voltage, SENSE and SET pins | VSENSE, VSET | -0.3 | 7 | V | 4 | ||
| Current, output pins | IUV, IOV | -40 | 40 | mA | 4 | ||
| Operating junction temperature | TJ | -40 | 150 | °C | 4 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Power-up reset delay / startup delay timing | tSD | 300 | µs | VDD at or above 2V | 6 | ||
| High-to-low propagation delay | tpd(HL) | 19 | µs | VDD = 2V, 2.5% input overdrive, RPU = 10kΩ | 6 | ||
| Low-to-high propagation delay | tpd(LH) | 35 | µs | VDD = 2V, 2.5% input overdrive, RPU = 10kΩ | 6 | ||
| Output rise time | tR | 2.2 | µs | VDD = 2V, RPU = 10kΩ | 6 | ||
| Output fall time | tF | 0.22 | µs | VDD = 2V, RPU = 10kΩ | 6 | ||
| Internal pull-up current, SET pin | ISET | 600 | nA | VDD = 18V, SET pin = GND | 5 | ||
| Junction-to-ambient thermal resistance | RθJA | 201.6 | °C/W | DDC (SOT) 6 pins | 4 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 47.8 | °C/W | DDC (SOT) 6 pins | 4 | ||
| Junction-to-board thermal resistance | RθJB | 51.2 | °C/W | DDC (SOT) 6 pins | 4 | ||
| Junction-to-top characterization parameter | ψJT | 0.7 | °C/W | DDC (SOT) 6 pins | 4 | ||
| Junction-to-board characterization parameter | ψJB | 50.8 | °C/W | DDC (SOT) 6 pins | 4 |
CAD (KiCad official)
- Symbol:
TPS3702CX33QDDCRQ1 - Footprint:
Package_TO_SOT_SMD:TSOT-23-6 - 3D model: TSOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
tps3702cx33qddcrq1-etched.step/tps3702cx33qddcrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps3702cx33qddcrq1.step/tps3702cx33qddcrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (29 pp, sha256
8b204b8038a50a4f, retrieved 2026-11-06, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).