component
TPS3700DSER
Public Made by Adomby adom
Texas Instruments Comparators, WSON-6(1.5x1.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS3700DSER
Texas Instruments · Comparators · WSON-6(1.5x1.5)
TPS3700DSER from Texas Instruments, in a WSON-6(1.5x1.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTB | output | INB- comparator open-drain output that is driven low when the voltage on INB- exceeds VITP and goes high when the sense voltage returns below VITP - VHYS. |
| 2 | VDD | power_in | Supply voltage input; connect a 1.8-V to 18-V supply to power the device, with a 0.1-µF ceramic capacitor placed close to this pin as good analog practice. |
| 3 | INB- | input | Connected to the voltage to be monitored through an external resistor divider; when the voltage exceeds the threshold VITP, OUTB is driven low. |
| 4 | INA+ | input | Connected to the voltage to be monitored through an external resistor divider; when the voltage drops below the threshold VITP - VHYS, OUTA is driven low. |
| 5 | GND | power_in | Ground reference for the device. |
| 6 | OUTA | output | INA+ comparator open-drain output that is driven low when the voltage is below VITP - VHYS and goes high when the sense voltage returns above VITP. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-6(1.5x1.5) |
| Category | Amplifiers/Comparators |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage VDD | VDD | -0.3 | 20 | V | 5 | ||
| Output voltage OUTA, OUTB | OUTA, OUTB | -0.3 | 20 | V | 5 | ||
| Input voltage INA+, INB- | INA+, INB- | -0.3 | 7 | V | 5 | ||
| Output terminal current | 40 | mA | 5 | ||||
| Operating junction temperature | TJ | -40 | 125 | °C | 5 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 5 | ||
| Electrostatic discharge, human body model (HBM) | V(ESD) | -2500 | 2500 | V | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins | 5 | |
| Electrostatic discharge, charged device model (CDM) | V(ESD) | -1000 | 1000 | V | Charged device model (CDM), per JEDEC specification JESD22-C101, all pins | 5 | |
| Supply voltage VDD | VDD | 1.8 | 18 | V | 5 | ||
| Input voltage INA+, INB- | VI | 0 | 6.5 | V | 5 | ||
| Output voltage OUTA, OUTB | VO | 0 | 18 | V | 5 | ||
| Supply voltage range | VDD | 1.8 | 18 | V | 6 | ||
| Power-on reset voltage | V(POR) | 0.8 | V | VOLmax = 0.2 V, I(OUTA/B) = 15 µA | 6 | ||
| Positive-going input threshold voltage, VDD = 1.8 V | VIT+ | 396 | 400 | 404 | mV | VDD = 1.8 V | 6 |
| Positive-going input threshold voltage, VDD = 18 V | VIT+ | 396 | 400 | 404 | mV | VDD = 18 V | 6 |
| Negative-going input threshold voltage, VDD = 1.8 V | VIT- | 387 | 394.5 | 400 | mV | VDD = 1.8 V | 6 |
| Negative-going input threshold voltage, VDD = 18 V | VIT- | 387 | 394.5 | 400 | mV | VDD = 18 V | 6 |
| Hysteresis voltage | Vhys | 5.5 | 12 | mV | 6 | ||
| Input current at the INA+ terminal | I(INA+) | -25 | 1 | 25 | nA | VDD = 1.8 V and 18 V, VI = 6.5 V | 6 |
| Input current at the INB- terminal | I(INB-) | -15 | 1 | 15 | nA | VDD = 1.8 V and 18 V, VI = 0.1 V | 6 |
| Low-level output voltage, VDD = 1.3 V | VOL | 250 | mV | VDD = 1.3 V, IO = 0.4 mA | 6 | ||
| Low-level output voltage, VDD = 1.8 V | VOL | 250 | mV | VDD = 1.8 V, IO = 3 mA | 6 | ||
| Low-level output voltage, VDD = 5 V | VOL | 250 | mV | VDD = 5 V, IO = 5 mA | 6 | ||
| Open-drain output leakage current | Ilkg(OD) | 300 | nA | VDD = 1.8 V and 18 V, VO = VDD | 6 | ||
| Supply current | IDD | 5.5 | 11 | µA | VDD = 1.8 V, no load | 6 | |
| Supply current | IDD | 6 | 13 | µA | VDD = 5 V | 6 | |
| Supply current | IDD | 7 | 13 | µA | VDD = 18 V | 6 | |
| Start-up delay | 150 | 450 | µs | 6 | |||
| Undervoltage lockout | UVLO | 1.3 | 1.7 | V | VDD falling | 6 | |
| Recommended thermal resistance, junction-to-ambient (WSON DSE) | RθJA | 194.9 | °C/W | DSE (WSON) 6 pins | 5 | ||
| Junction-to-case (top) thermal resistance (WSON DSE) | RθJC(top) | 128.9 | °C/W | DSE (WSON) 6 pins | 5 | ||
| Junction-to-board thermal resistance (WSON DSE) | RθJB | 153.8 | °C/W | DSE (WSON) 6 pins | 5 | ||
| Junction-to-top characterization parameter (WSON DSE) | ψJT | 11.9 | °C/W | DSE (WSON) 6 pins | 5 | ||
| Junction-to-board characterization parameter (WSON DSE) | ψJB | 157.4 | °C/W | DSE (WSON) 6 pins | 5 | ||
| High-to-low propagation delay | tPHL | 18 | µs | VDD = 5 V, 10-mV input overdrive, RP = 10 kΩ, VOH = 0.9 × VDD, VOL = 400 mV, see Figure 1 | 7 | ||
| Low-to-high propagation delay | tPLH | 29 | µs | VDD = 5 V, 10-mV input overdrive, RP = 10 kΩ, VOH = 0.9 × VDD, VOL = 400 mV, see Figure 1 | 7 | ||
| Output rise time | tr | 2.2 | µs | VDD = 5 V, 10-mV input overdrive, RP = 10 kΩ, VO = (0.1 to 0.9) × VDD | 7 | ||
| Output fall time | tf | 0.22 | µs | VDD = 5 V, 10-mV input overdrive, RP = 10 kΩ, VO = (0.1 to 0.9) × VDD | 7 |
CAD (KiCad official)
- Symbol:
TPS3700DSER - Footprint:
Package_SON:WSON-6_1.5x1.5mm_P0.5mm - 3D model: WSON-6(1.5x1.5) (KiCad packages3D, STEP)
- 3D model files:
tps3700dser-etched.step/tps3700dser-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps3700dser.step/tps3700dser.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (27 pp, sha256
93d2b46073af7344, retrieved 2026-10-21, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS3700DSER
**Texas Instruments** · Comparators · WSON-6(1.5x1.5)
TPS3700DSER from Texas Instruments, in a WSON-6(1.5x1.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTB | output | INB- comparator open-drain output that is driven low when the voltage on INB- exceeds VITP and goes high when the sense voltage returns below VITP - VHYS. |
| 2 | VDD | power_in | Supply voltage input; connect a 1.8-V to 18-V supply to power the device, with a 0.1-µF ceramic capacitor placed close to this pin as good analog practice. |
| 3 | INB- | input | Connected to the voltage to be monitored through an external resistor divider; when the voltage exceeds the threshold VITP, OUTB is driven low. |
| 4 | INA+ | input | Connected to the voltage to be monitored through an external resistor divider; when the voltage drops below the threshold VITP - VHYS, OUTA is driven low. |
| 5 | GND | power_in | Ground reference for the device. |
| 6 | OUTA | output | INA+ comparator open-drain output that is driven low when the voltage is below VITP - VHYS and goes high when the sense voltage returns above VITP. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-6(1.5x1.5) |
| Category | Amplifiers/Comparators |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage VDD | VDD | -0.3 | | 20 | V | | 5 |
| Output voltage OUTA, OUTB | OUTA, OUTB | -0.3 | | 20 | V | | 5 |
| Input voltage INA+, INB- | INA+, INB- | -0.3 | | 7 | V | | 5 |
| Output terminal current | | | | 40 | mA | | 5 |
| Operating junction temperature | TJ | -40 | | 125 | °C | | 5 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 5 |
| Electrostatic discharge, human body model (HBM) | V(ESD) | -2500 | | 2500 | V | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins | 5 |
| Electrostatic discharge, charged device model (CDM) | V(ESD) | -1000 | | 1000 | V | Charged device model (CDM), per JEDEC specification JESD22-C101, all pins | 5 |
| Supply voltage VDD | VDD | 1.8 | | 18 | V | | 5 |
| Input voltage INA+, INB- | VI | 0 | | 6.5 | V | | 5 |
| Output voltage OUTA, OUTB | VO | 0 | | 18 | V | | 5 |
| Supply voltage range | VDD | 1.8 | | 18 | V | | 6 |
| Power-on reset voltage | V(POR) | | | 0.8 | V | VOLmax = 0.2 V, I(OUTA/B) = 15 µA | 6 |
| Positive-going input threshold voltage, VDD = 1.8 V | VIT+ | 396 | 400 | 404 | mV | VDD = 1.8 V | 6 |
| Positive-going input threshold voltage, VDD = 18 V | VIT+ | 396 | 400 | 404 | mV | VDD = 18 V | 6 |
| Negative-going input threshold voltage, VDD = 1.8 V | VIT- | 387 | 394.5 | 400 | mV | VDD = 1.8 V | 6 |
| Negative-going input threshold voltage, VDD = 18 V | VIT- | 387 | 394.5 | 400 | mV | VDD = 18 V | 6 |
| Hysteresis voltage | Vhys | | 5.5 | 12 | mV | | 6 |
| Input current at the INA+ terminal | I(INA+) | -25 | 1 | 25 | nA | VDD = 1.8 V and 18 V, VI = 6.5 V | 6 |
| Input current at the INB- terminal | I(INB-) | -15 | 1 | 15 | nA | VDD = 1.8 V and 18 V, VI = 0.1 V | 6 |
| Low-level output voltage, VDD = 1.3 V | VOL | | | 250 | mV | VDD = 1.3 V, IO = 0.4 mA | 6 |
| Low-level output voltage, VDD = 1.8 V | VOL | | | 250 | mV | VDD = 1.8 V, IO = 3 mA | 6 |
| Low-level output voltage, VDD = 5 V | VOL | | | 250 | mV | VDD = 5 V, IO = 5 mA | 6 |
| Open-drain output leakage current | Ilkg(OD) | | | 300 | nA | VDD = 1.8 V and 18 V, VO = VDD | 6 |
| Supply current | IDD | | 5.5 | 11 | µA | VDD = 1.8 V, no load | 6 |
| Supply current | IDD | | 6 | 13 | µA | VDD = 5 V | 6 |
| Supply current | IDD | | 7 | 13 | µA | VDD = 18 V | 6 |
| Start-up delay | | 150 | | 450 | µs | | 6 |
| Undervoltage lockout | UVLO | 1.3 | | 1.7 | V | VDD falling | 6 |
| Recommended thermal resistance, junction-to-ambient (WSON DSE) | RθJA | | 194.9 | | °C/W | DSE (WSON) 6 pins | 5 |
| Junction-to-case (top) thermal resistance (WSON DSE) | RθJC(top) | | 128.9 | | °C/W | DSE (WSON) 6 pins | 5 |
| Junction-to-board thermal resistance (WSON DSE) | RθJB | | 153.8 | | °C/W | DSE (WSON) 6 pins | 5 |
| Junction-to-top characterization parameter (WSON DSE) | ψJT | | 11.9 | | °C/W | DSE (WSON) 6 pins | 5 |
| Junction-to-board characterization parameter (WSON DSE) | ψJB | | 157.4 | | °C/W | DSE (WSON) 6 pins | 5 |
| High-to-low propagation delay | tPHL | | 18 | | µs | VDD = 5 V, 10-mV input overdrive, RP = 10 kΩ, VOH = 0.9 × VDD, VOL = 400 mV, see Figure 1 | 7 |
| Low-to-high propagation delay | tPLH | | 29 | | µs | VDD = 5 V, 10-mV input overdrive, RP = 10 kΩ, VOH = 0.9 × VDD, VOL = 400 mV, see Figure 1 | 7 |
| Output rise time | tr | | 2.2 | | µs | VDD = 5 V, 10-mV input overdrive, RP = 10 kΩ, VO = (0.1 to 0.9) × VDD | 7 |
| Output fall time | tf | | 0.22 | | µs | VDD = 5 V, 10-mV input overdrive, RP = 10 kΩ, VO = (0.1 to 0.9) × VDD | 7 |
## CAD (KiCad official)
- Symbol: `TPS3700DSER`
- Footprint: `Package_SON:WSON-6_1.5x1.5mm_P0.5mm`
- 3D model: WSON-6(1.5x1.5) (KiCad packages3D, STEP)
- 3D model files: `tps3700dser-etched.step` / `tps3700dser-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps3700dser.step` / `tps3700dser.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps3700) (27 pp, sha256 `93d2b46073af7344`, retrieved 2026-10-21, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps3700dser-datasheet.pdf)