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TPS3619-33DGK
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Texas Instruments Supervisor And Reset ICs, VSSOP-8-0.65mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS3619-33DGK
Texas Instruments · Supervisor And Reset ICs · VSSOP-8-0.65mm
TPS3619-33DGK from Texas Instruments, in a VSSOP-8-0.65mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | output | Supply output that connects to VDD or VBAT through internal switches, with continuous output current limited to 300 mA under the recommended operating conditions. |
| 2 | VDD | power_in | Input supply voltage, with a recommended operating range of 1.65 V to 5.5 V. |
| 3 | GND | power_in | Ground reference; all voltages in the absolute maximum ratings are specified with respect to GND. |
| 4 | PFI | input | Power-fail comparator input, compared against an internal 1.15 V reference, with input current limited to ±25 nA and a maximum voltage of VDD + 0.3 V. |
| 5 | PFO | output | Power-fail comparator output that goes low when PFI falls below the 1.15 V threshold and returns high after about 12 mV of hysteresis, with a low-level output of 0.4 V maximum at VDD = 3.3 V and IOL = 2 mA. |
| 6 | MR | input | Manual reset input with VIH of 0.7 × VDD and VIL of 0.3 × VDD, and an input transition rise and fall rate limited to 100 ns/V. |
| 7 | RESET | output | Active-low reset output that is asserted while VDD is below the threshold VIT and is released after a fixed 100 ms delay (60 to 140 ms) once VDD rises above VIT. |
| 8 | VBAT | power_in | Backup-battery input with a recommended supply voltage of 1.5 V to 5.5 V, which may exceed VDD. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-8-0.65mm |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TPS3619-33DGK - Footprint:
Package_SO:VSSOP-8_2.3x2mm_P0.5mm - 3D model: VSSOP-8-0.65mm (KiCad packages3D, STEP)
- 3D model files:
tps3619-33dgk-etched.step/tps3619-33dgk-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps3619-33dgk.step/tps3619-33dgk.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (19 pp, sha256
38d6bfcf1de94bfc, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS3619-33DGK
**Texas Instruments** · Supervisor And Reset ICs · VSSOP-8-0.65mm
TPS3619-33DGK from Texas Instruments, in a VSSOP-8-0.65mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | output | Supply output that connects to VDD or VBAT through internal switches, with continuous output current limited to 300 mA under the recommended operating conditions. |
| 2 | VDD | power_in | Input supply voltage, with a recommended operating range of 1.65 V to 5.5 V. |
| 3 | GND | power_in | Ground reference; all voltages in the absolute maximum ratings are specified with respect to GND. |
| 4 | PFI | input | Power-fail comparator input, compared against an internal 1.15 V reference, with input current limited to ±25 nA and a maximum voltage of VDD + 0.3 V. |
| 5 | PFO | output | Power-fail comparator output that goes low when PFI falls below the 1.15 V threshold and returns high after about 12 mV of hysteresis, with a low-level output of 0.4 V maximum at VDD = 3.3 V and IOL = 2 mA. |
| 6 | MR | input | Manual reset input with VIH of 0.7 × VDD and VIL of 0.3 × VDD, and an input transition rise and fall rate limited to 100 ns/V. |
| 7 | RESET | output | Active-low reset output that is asserted while VDD is below the threshold VIT and is released after a fixed 100 ms delay (60 to 140 ms) once VDD rises above VIT. |
| 8 | VBAT | power_in | Backup-battery input with a recommended supply voltage of 1.5 V to 5.5 V, which may exceed VDD. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-8-0.65mm |
| Category | Power Management (PMIC) |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `TPS3619-33DGK`
- Footprint: `Package_SO:VSSOP-8_2.3x2mm_P0.5mm`
- 3D model: VSSOP-8-0.65mm (KiCad packages3D, STEP)
- 3D model files: `tps3619-33dgk-etched.step` / `tps3619-33dgk-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps3619-33dgk.step` / `tps3619-33dgk.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps3619) (19 pp, sha256 `38d6bfcf1de94bfc`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps3619-33dgk-datasheet.pdf)