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TPS3600D33PWR
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Texas Instruments Supervisor And Reset ICs, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS3600D33PWR
Texas Instruments · Supervisor And Reset ICs · TSSOP-14
TPS3600D33PWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Supply output that the supervisor monitors against the threshold VIT to control RESET. |
| 2 | VDD | power_in | Input supply voltage; RESET is asserted when VDD (or VBAT) rises above Vres, and VDD must exceed VIT to enter the battery freshness seal mode. |
| 3 | GND | power_in | Ground reference for the device. |
| 4 | MSWITCH | input | Manual switch input that forces the device into battery-backup mode; connect to GND if not used. |
| 5 | CEIN | input | Chip-enable input passed through a series transmission gate to CEOUT; it becomes high impedance while reset is asserted. |
| 6 | BATTON | output | Logic output and external bypass switch driver output indicating battery-backup operation. |
| 7 | PFI | input | Power-fail comparator input that must be connected to GND if not used. |
| 8 | PFO | output | Power-fail comparator output. |
| 9 | BATTOK | output | Battery status output that transitions high-to-low when VBAT falls below the negative-going threshold V(BOK), checked every 200 ms. |
| 10 | CEOUT | output | Chip-enable output; an active pullup connects it to VOUT during disable mode. |
| 11 | MR | input | Manual reset input. |
| 12 | WDI | input | Watchdog timer input with an 800-ms time-out. |
| 13 | RESET | output | Active-low reset output that stays asserted while VOUT is below VIT and for the internal delay after VOUT rises above VIT. |
| 14 | VBAT | power_in | Backup-battery input that may exceed VDD. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Power Management (PMIC) |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
TPS3600D33PWR - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
tps3600d33pwr-etched.step/tps3600d33pwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps3600d33pwr.step/tps3600d33pwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (28 pp, sha256
22e4caa11ae7d5c6, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS3600D33PWR
**Texas Instruments** · Supervisor And Reset ICs · TSSOP-14
TPS3600D33PWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Supply output that the supervisor monitors against the threshold VIT to control RESET. |
| 2 | VDD | power_in | Input supply voltage; RESET is asserted when VDD (or VBAT) rises above Vres, and VDD must exceed VIT to enter the battery freshness seal mode. |
| 3 | GND | power_in | Ground reference for the device. |
| 4 | MSWITCH | input | Manual switch input that forces the device into battery-backup mode; connect to GND if not used. |
| 5 | CEIN | input | Chip-enable input passed through a series transmission gate to CEOUT; it becomes high impedance while reset is asserted. |
| 6 | BATTON | output | Logic output and external bypass switch driver output indicating battery-backup operation. |
| 7 | PFI | input | Power-fail comparator input that must be connected to GND if not used. |
| 8 | PFO | output | Power-fail comparator output. |
| 9 | BATTOK | output | Battery status output that transitions high-to-low when VBAT falls below the negative-going threshold V(BOK), checked every 200 ms. |
| 10 | CEOUT | output | Chip-enable output; an active pullup connects it to VOUT during disable mode. |
| 11 | MR | input | Manual reset input. |
| 12 | WDI | input | Watchdog timer input with an 800-ms time-out. |
| 13 | RESET | output | Active-low reset output that stays asserted while VOUT is below VIT and for the internal delay after VOUT rises above VIT. |
| 14 | VBAT | power_in | Backup-battery input that may exceed VDD. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Power Management (PMIC) |
| Pins | 14 |
## CAD (KiCad official)
- Symbol: `TPS3600D33PWR`
- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`
- 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files: `tps3600d33pwr-etched.step` / `tps3600d33pwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps3600d33pwr.step` / `tps3600d33pwr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps3600) (28 pp, sha256 `22e4caa11ae7d5c6`, retrieved 2026-10-11, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps3600d33pwr-datasheet.pdf)