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TPS3511DR

Public Made by Adom

by adom

Texas Instruments Supervisor And Reset ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tps3511drfactory-2.0.0extractor-text
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Generated by kicad-footprint-generator · KiCad file format 20260206
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README.md Initial commit: component/tps3511dr · Ray 1d ago
tps3511dr-etched.glb tps3511dr: factory component page (tier=mfr) · Ray 1d ago
tps3511dr-etched.step tps3511dr: factory component page (tier=mfr) · Ray 1d ago
tps3511dr-hero.glb tps3511dr: hero GLB from the etched model (keeps the MPN mark) · Ray 1h ago
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TPS3511DR

Texas Instruments · Supervisor And Reset ICs · SOIC-8

TPS3511DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PGI input Power-good input that is compared against internal thresholds of 1.15 V (PGI1) and 0.95 V (PGI2), with input voltage limited to VDD + 0.3 V (7 V maximum).
2 GND power_in Ground reference for all device voltages; all voltage values in the datasheet are measured with respect to GND.
3 FPO output Inverted fault protection output with an open-drain stage that goes high when a fault is latched; it can be pulled up to 15 V and sinks up to 20 mA.
4 PSON input Active-low ON/OFF control with VIH of 2.4 V minimum and VIL of 1.2 V maximum, and an input voltage limit of 7 V maximum.
5 VS33 input 3.3 V over- and undervoltage protection input, with an overvoltage threshold of 3.7 V to 4.1 V and an undervoltage threshold of 2.2 V typical.
6 VS5 input 5 V over- and undervoltage protection input, with an overvoltage threshold of 5.7 V to 6.5 V and an undervoltage threshold of 3.5 V typical.
7 VDD power_in Supply voltage input for 4 V to 15 V operation that also senses the 12 V rail for overvoltage protection, with a 12 V overvoltage threshold of 13.2 V to 14.4 V.
8 PGO output Power-good output with an open-drain stage that goes low on a fault; it can be pulled up to 7 V and sinks up to 10 mA.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Power Management (PMIC)
Pins 8

CAD (KiCad official)

  • Symbol: TPS3511DR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tps3511dr-etched.step / tps3511dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps3511dr.step / tps3511dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (20 pp, sha256 8329403ee74d31d4, retrieved 2026-10-07, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF