component
TPS2HB50AQPWPRQ1
Public Made by Adomby adom
Texas Instruments Power Distribution Switches, HTSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownTPS2HB50AQPWPRQ1
Texas Instruments · Power Distribution Switches · HTSSOP-16-EP
TPS2HB50AQPWPRQ1 from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Device ground reference for all voltages, with the datasheet specifying operating voltages measured with respect to device GND. |
| 2 | SNS | output | Analog sense output for load current, device temperature, and fault indication, with the sense pin voltage limited to -1 V to 7 V in recommended operating conditions. |
| 3 | LATCH | input | Sets the fault handling behavior to latched or auto-retry, with the LATCH voltage limited to -1 V to 5.5 V in recommended operating conditions. |
| 4 | EN1 | input | Channel 1 active-high control input, with the enable voltage limited to -1 V to 5.5 V in recommended operating conditions. |
| 5 | ILIM1 | output | Connect a pull-up resistor to VBB to set the current-limit threshold on channel 1, with floating leaving the default internal threshold. |
| 6 | VOUT1 | output | Channel 1 output to the load, which is one of three VOUT1 pins. |
| 7 | VOUT1 | output | Channel 1 output to the load, which is one of three VOUT1 pins. |
| 8 | VOUT1 | output | Channel 1 output to the load, which is one of three VOUT1 pins. |
| 9 | VOUT2 | output | Channel 2 output to the load, which is one of three VOUT2 pins. |
| 10 | VOUT2 | output | Channel 2 output to the load, which is one of three VOUT2 pins. |
| 11 | VOUT2 | output | Channel 2 output to the load, which is one of three VOUT2 pins. |
| 12 | ILIM2 | output | Connect a pull-up resistor to VBB to set the current-limit threshold on channel 2, with floating leaving the default internal threshold. |
| 13 | EN2 | input | Channel 2 active-high control input, with the enable voltage limited to -1 V to 5.5 V in recommended operating conditions. |
| 14 | SEL1 | input | Diagnostics select 1, which selects the TJ sensing feature, with the select voltage limited to -1 V to 5.5 V in recommended operating conditions. |
| 15 | SEL2 | input | Diagnostics select 2, which enables CH2 current sensing and open load detection when set high, with the select voltage limited to -1 V to 5.5 V in recommended operating conditions. |
| 16 | DIA_EN | input | Active-high diagnostic enable, with the diagnostic enable voltage limited to -1 V to 5.5 V in recommended operating conditions. |
| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-16-EP |
| Category | Power Management (PMIC) |
| Pins | 17 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Current limit threshold | ICL | 7 | 10 | 14.4 | A | Version A, RILIM = 5 kΩ, TJ = -40°C to 150°C | 8 |
| Current limit threshold | ICL | 1.325 | 2 | 3.2 | A | Version A, RILIM = 25 kΩ, TJ = -40°C to 150°C | 8 |
| Current limit threshold | ICL | 11.8 | A | Version A, RILIM = GND, open, or out of range, TJ = -40°C to 150°C | 8 | ||
| Current limit ratio | KCL | 35 | 50 | 80 | A * kΩ | Version A | 8 |
| VDS clamp voltage | VDSCLAMP | 40 | 46 | V | 7 | ||
| VBB clamp voltage | VBBCLAMP | 58 | 76 | V | 7 | ||
| VBB undervoltage lockout falling | VUVLOF | 2 | 3 | V | Measured with respect to the GND pin of the device | 7 | |
| VBB undervoltage lockout rising | VUVLOR | 2.2 | 3 | V | Measured with respect to the GND pin of the device | 7 | |
| Standby current (total device leakage) | ISB | 0.5 | µA | VBB = 13.5 V, TJ = 25°C, VENx = VDIA_EN = 0 V, VOUT = 0 V | 7 | ||
| Standby current (total device leakage) | ISB | 4 | µA | VBB = 13.5 V, TJ = 125°C, VENx = VDIA_EN = 0 V, VOUT = 0 V | 7 | ||
| Continuous load current, per channel | ILNOM | 3 | A | Two channels enabled, TAMB = 70°C | 7 | ||
| Continuous load current, per channel | ILNOM | 4.5 | A | One channel enabled, TAMB = 70°C | 7 | ||
| Output leakage current (per channel) | IOUT(standby) | 0.01 | 0.5 | µA | VBB = 13.5 V, TJ = 25°C, VENx = VDIA_EN = 0 V, VOUT = 0 V | 7 | |
| Output leakage current (per channel) | IOUT(standby) | 1.5 | µA | VBB = 13.5 V, TJ = 125°C, VENx = VDIA_EN = 0 V, VOUT = 0 V | 7 | ||
| Quiescent current | IQ | 3 | 6 | mA | VBB = 13.5 V, VENx = VDIA_EN = 5 V, IOUTx = 0 A | 7 | |
| Standby mode delay time | tSTBY | 12 | 17 | 22 | ms | VENx = VDIA_EN = 0 V to standby | 7 |
| On-resistance (includes MOSFET and package) | RON | 50 | mΩ | TJ = 25°C, 6 V ≤ VBB ≤ 28 V, IOUT1 = IOUT2 > 1 A | 7 | ||
| On-resistance (includes MOSFET and package) | RON | 100 | mΩ | TJ = 150°C, 6 V ≤ VBB ≤ 28 V, IOUT1 = IOUT2 > 1 A | 7 | ||
| On-resistance (includes MOSFET and package) | RON | 75 | mΩ | TJ = 25°C, 3 V ≤ VBB ≤ 6 V, IOUT1 = IOUT2 > 1 A | 7 | ||
| On-resistance during reverse polarity | RON(REV) | 50 | mΩ | TJ = 25°C, -18 V ≤ VBB ≤ -8 V | 7 | ||
| On-resistance during reverse polarity | RON(REV) | 100 | mΩ | TJ = 105°C, -18 V ≤ VBB ≤ -8 V | 7 | ||
| Current sense accuracy | ISNSI | -5 | 5 | % | VEN = VDIA_EN = 5 V, VSEL1 = 0 V, IOUT = 3 A | 8 | |
| Current sense accuracy | ISNSI | -6 | 6 | % | VEN = VDIA_EN = 5 V, VSEL1 = 0 V, IOUT = 100 mA | 8 | |
| Current sense accuracy | ISNSI | -11 | 11 | % | VEN = VDIA_EN = 5 V, VSEL1 = 0 V, IOUT = 50 mA | 8 | |
| Current sense accuracy | ISNSI | -28 | 28 | % | VEN = VDIA_EN = 5 V, VSEL1 = 0 V, IOUT = 20 mA | 8 | |
| Temperature sense current | ISNST | 0 | 0.12 | 0.29 | mA | VDIA_EN = 5 V, VSEL1 = 5 V, VSEL2 = 0 V, TJ = -40°C | 8 |
| Temperature sense current | ISNST | 0.68 | 0.85 | 1.02 | mA | VDIA_EN = 5 V, VSEL1 = 5 V, VSEL2 = 0 V, TJ = 25°C | 8 |
| Temperature sense current | ISNST | 1.25 | 1.52 | 1.79 | mA | VDIA_EN = 5 V, VSEL1 = 5 V, VSEL2 = 0 V, TJ = 85°C | 8 |
| Temperature sense current | ISNST | 1.61 | 1.96 | 2.31 | mA | VDIA_EN = 5 V, VSEL1 = 5 V, VSEL2 = 0 V, TJ = 125°C | 8 |
| Temperature sense current | ISNST | 1.8 | 2.25 | 2.7 | mA | VDIA_EN = 5 V, VSEL1 = 5 V, VSEL2 = 0 V, TJ = 150°C | 8 |
| ISNS fault high-level | ISNSFH | 4 | 4.5 | 5.3 | mA | VDIA_EN = 5 V, VSEL1 = 0 V, VSEL2 = X | 8 |
| Open-load (OL) detection voltage | VOL | 2 | 3 | 4 | V | VENx = 0 V, VDIA_EN = 5 V | 8 |
| OL and STB indication time from ENx falling | tOL1 | 300 | 500 | 700 | µs | VENx = 5 V to 0 V, VDIA_EN = 5 V, VSEL1 = 0 V, IOUT = 0 mA, VOUTx = 4 V | 8 |
| Thermal shutdown | TABS | 150 | °C | 8 | |||
| Relative thermal shutdown | TREL | 50 | °C | 8 | |||
| Thermal shutdown hysteresis | THYS | 28 | °C | 8 | |||
| Input voltage low-level (EN1, EN2) | VIL, ENx | 0.8 | V | No GND network diode | 9 | ||
| Input voltage high-level (EN1, EN2) | VIH, ENx | 2 | V | No GND network diode | 9 | ||
| Input voltage high-level (DIA_EN) | VIH, DIA_EN | 2 | V | No GND network diode | 9 | ||
| Maximum continuous supply voltage | VBB | 36 | V | 6 | |||
| Load dump voltage | VLD | 40 | V | ISO16750-2:2010(E) | 6 | ||
| Reverse battery voltage | VRev | -18 | V | t ≤ 3 minutes | 6 | ||
| Enable pin voltage | VEN1, VEN2 | -1 | 7 | V | 6 | ||
| LATCH pin voltage | VLATCH | -1 | 7 | V | 6 | ||
| Diagnostic enable pin voltage | VDIA_EN | -1 | 7 | V | 6 | ||
| Sense pin voltage | VSNS | -1 | 18 | V | 6 | ||
| Select pin voltage | VSEL1, VSEL2 | -1 | 7 | V | 6 | ||
| Reverse ground current | IGND | -50 | mA | VBB < 0 V | 6 | ||
| Energy dissipation during turnoff (single pulse) | ETOFF | 21 | mJ | Single pulse, one channel, LOUT = 5 mH, TJ,start = 125°C | 6 | ||
| Energy dissipation during turnoff (repetitive pulse) | ETOFF | 8 | mJ | Repetitive pulse, one channel, LOUT = 5 mH, TJ,start = 125°C | 6 | ||
| Maximum junction temperature | TJ | 150 | °C | 6 | |||
| Maximum junction temperature - limited duration | TJ | 170 | °C | t < 100 hours | 6 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 6 | ||
| Nominal supply voltage | VBB | 6 | 18 | V | Nominal supply voltage | 6 | |
| Extended supply voltage | VBB | 3 | 28 | V | Extended supply voltage | 6 | |
| Enable voltage | VEN1, VEN2 | -1 | 5.5 | V | 6 | ||
| Operating free-air temperature | TA | -40 | 125 | °C | 6 | ||
| Junction-to-ambient thermal resistance | RθJA | 34.6 | °C/W | PWP (HTSSOP) 16 pins, 4-layer PCB | 7 |
CAD (KiCad official)
- Symbol:
TPS2HB50AQPWPRQ1 - Footprint:
Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm - 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)
- 3D model files:
tps2hb50aqpwprq1-etched.step/tps2hb50aqpwprq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps2hb50aqpwprq1.step/tps2hb50aqpwprq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (54 pp, sha256
4549a67d7986f86d, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).