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TPS28226DR

Public Made by Adom

by adom

Texas Instruments Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 15d ago
viewers tps28226dr: viewers · Ray 15d ago
package.json Publish 0.1.0 · Ray 15d ago
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README.md Publish 0.1.0 · Ray 15d ago
tps28226dr-etched.glb tps28226dr: factory component page (tier=mfr) · Ray 15d ago
tps28226dr-etched.step tps28226dr: factory component page (tier=mfr) · Ray 15d ago
tps28226dr-hero.glb tps28226dr: hero GLB from the etched model (keeps the MPN mark) · Ray 15d ago
tps28226dr-hero.overlay.json Publish 0.1.0 · Ray 15d ago
tps28226dr.glb Publish 0.1.0 · Ray 15d ago
tps28226dr.kicad_mod Publish 0.1.0 · Ray 15d ago
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tps28226dr.step Publish 0.1.0 · Ray 15d ago

TPS28226DR

Texas Instruments · Gate Drivers · SOIC-8

TPS28226DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 UGATE output Upper gate drive sink/source output, connected to the gate of the high-side power N-channel MOSFET.
2 BOOT bidirectional Floating bootstrap supply for the upper gate drive; the bootstrap capacitor connects between this pin and PHASE, and the absolute maximum boot voltage is 33 V to GND.
3 PWM input Control input from the controller PWM output that supports three states, including the 3-state shutdown, with an input voltage absolute maximum of 13.2 V.
4 GND power_in Ground pin to which all signals are referenced, and to which the exposed thermal pad should be connected directly.
5 LGATE output Lower gate drive sink and source output, connected to the gate of the low-side power N-channel MOSFET.
6 VDD power_in Bias supply pin that requires a high-quality bypass capacitor to GND; recommended VDD is 6.8 V to 8 V with an absolute maximum of 8.8 V.
7 EN/PG bidirectional Enable/power good input/output with 1-MΩ impedance that is driven High to enable and Low to disable, draws less than 350 µA when disabled, and is pulled low on VDD UVLO or over-temperature shutdown.
8 PHASE input Connects to the source of the upper MOSFET and the drain of the lower MOSFET, and provides the return path for the upper gate driver.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Motor Driver ICs
Pins 8

CAD (KiCad official)

  • Symbol: TPS28226DR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tps28226dr-etched.step / tps28226dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps28226dr.step / tps28226dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (41 pp, sha256 052e1a289875398b, retrieved 2026-10-11, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF