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TPS28225TDRQ1
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Texas Instruments Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS28225TDRQ1
Texas Instruments · Gate Drivers · SOIC-8
TPS28225TDRQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | UGATE | output | Upper gate-drive sink and source output capable of sourcing 2 A and sinking 4 A for driving high-side power N-Channel MOSFET. |
| 2 | BOOT | power_in | Floating bootstrap supply pin for charging bootstrap capacitor connected between BOOT and PHASE to provide upper MOSFET gate drive voltage. |
| 3 | PWM | input | PWM control input signal with amplitude range 2-V to 13.2-V and three distinct operating states for controlling driver output. |
| 4 | GND | power_in | Ground reference pin with all signals referenced to this node. |
| 5 | LGATE | output | Lower gate-drive sink and source output capable of sourcing 2 A and sinking 4 A for driving low-side power N-Channel MOSFET. |
| 6 | VDD | power_in | Power supply input with nominal range 4.5-V to 8-V, requiring 0.22-µF to 4.7-µF bypass capacitor to GND. |
| 7 | EN/PG | tri_state | Enable and Power Good input-output with 1-MΩ impedance; drive HIGH to enable or LOW to disable; internally pulled low on UVLO threshold or overtemperature shutdown. |
| 8 | PHASE | input | Switching node connection to source of upper MOSFET and drain of lower MOSFET, providing reference return path for upper gate driver and bootstrap capacitor. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Motor Driver ICs |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TPS28225TDRQ1 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tps28225tdrq1-etched.step/tps28225tdrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps28225tdrq1.step/tps28225tdrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (37 pp, sha256
d886c912da96ee49, retrieved 2026-10-07, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS28225TDRQ1
**Texas Instruments** · Gate Drivers · SOIC-8
TPS28225TDRQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | UGATE | output | Upper gate-drive sink and source output capable of sourcing 2 A and sinking 4 A for driving high-side power N-Channel MOSFET. |
| 2 | BOOT | power_in | Floating bootstrap supply pin for charging bootstrap capacitor connected between BOOT and PHASE to provide upper MOSFET gate drive voltage. |
| 3 | PWM | input | PWM control input signal with amplitude range 2-V to 13.2-V and three distinct operating states for controlling driver output. |
| 4 | GND | power_in | Ground reference pin with all signals referenced to this node. |
| 5 | LGATE | output | Lower gate-drive sink and source output capable of sourcing 2 A and sinking 4 A for driving low-side power N-Channel MOSFET. |
| 6 | VDD | power_in | Power supply input with nominal range 4.5-V to 8-V, requiring 0.22-µF to 4.7-µF bypass capacitor to GND. |
| 7 | EN/PG | tri_state | Enable and Power Good input-output with 1-MΩ impedance; drive HIGH to enable or LOW to disable; internally pulled low on UVLO threshold or overtemperature shutdown. |
| 8 | PHASE | input | Switching node connection to source of upper MOSFET and drain of lower MOSFET, providing reference return path for upper gate driver and bootstrap capacitor. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Motor Driver ICs |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `TPS28225TDRQ1`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `tps28225tdrq1-etched.step` / `tps28225tdrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps28225tdrq1.step` / `tps28225tdrq1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps28225-q1) (37 pp, sha256 `d886c912da96ee49`, retrieved 2026-10-07, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps28225tdrq1-datasheet.pdf)